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fix(fpga): elaboration ratchet green -- uart restored, adapter recorded, ternary_isa a named gap - #6686
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…sa W459 gap (Closes #5908) The elaboration ratchet read 178 vs 176 on master. uart 1 -> 0 by restoring the spec line #4651 replaced with an on_clock reproduction of #2364 (seals resealed on the t27c lab). adapter is a new module at 0 errors. ternary_isa 6 -> 7 is a known compiler gap (#6685, fix in PR #5948 awaiting the owner's owner-approved-foreign label) and is recorded as such in the baseline notes. Closes #5908 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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This was referenced Oct 6, 2026
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PR DashboardGenerated at: 2026-10-06 07:17:45 UTC
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This was referenced Oct 6, 2026
Merged
Merged
Merged
This was referenced Oct 6, 2026
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PR DashboardGenerated at: 2026-10-06 10:57:32 UTC
Summary
Seal Status
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This was referenced Oct 6, 2026
This was referenced Oct 6, 2026
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Closes #5908
Cause (master run 37423783199:
178 (baseline 176))uartfn on_comb(data: u8) -> bool { return uart_tx_send(data); }inspecs/fpga/uart.t27with anon_clockreproduction of compiler issue #2364:Could not find variable on_clock in ZeroDSP_UART.t27c seal --saveon the Railway t27c lab.adapterspecs/fpga/adapter.t27, which elaborates cleanly; the ratchet treats any new module as a failure.ternary_isagiven stages = [...](901ed4f, #4594) to the module array and dropsinput [263:0] stages;.owner-approved-foreignlabel. When it lands the row must return to 6.About PR #5948
It targets the same failure, but it changes
bootstrap/src/compiler.rs,tools/check_elab_ratchet.pyand the workflow, and has noowner-approved-foreignlabel, so under the only-t27 rule it cannot be finished here. This PR takes only its t27 and data parts (the uart line, the adapter row, the 12.0 version header). Once #5948 is labelled and merged, it lowersternary_isaback to 6 and should re-take the baseline.Verification (Railway t27c lab, master t27c at edb5372)
python3 tools/check_elab_ratchet.py->elaboration errors: 177 (baseline 177),OK, exit 0 (iverilog 11.0 on the lab; every row matches CI's 12.0 numbers).--self-checkpasses.tools/check_seal_currency.py-> 0 STALE.Only
.t27, t27c-written seals, baseline data and prose.🤖 Generated with Claude Code