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Port tools/check_catalog_integrity.py (Python, 4 functions) to specs/port/tools/check_catalog_integrity.t27 - #6875

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Oct 7, 2026
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gHashTag merged 2 commits into
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@gHashTag gHashTag commented Oct 6, 2026

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Closes #6402

Written by a bee on queen-6402 and published by tools/queen/publish.py. The branch itself is the bee's; the second commit is the coordination entry every pull request must add, which a bee has no way to know about.

1 file changed, 63 insertions(+)

🤖 Generated with Claude Code

Trinity Bee and others added 2 commits October 5, 2026 19:01
The turn ended with these files edited and never committed. Uncommitted
work is invisible to the review - it reads the branch - so the attempt
would have been released as empty and the next bee would have started
beside this work rather than from it.

This commit is not a claim that the work is correct. It is the bee's
work, committed on its behalf, and it is judged exactly like any other:
the adversarial reviewer reads it, the compiler runs on it, and the
issue's own criteria are measured against it.

Issue: #6402
Turn: 9931746e-451c-4972-af71-7d69eb5801f7
Ending: finished (the turn closed)
Committed: 1 path(s)
Left uncommitted: 0 path(s) outside the declared boundary
A pull request must add exactly one docs/now entry and a bee has no way
to know that: its brief names a boundary file and acceptance criteria,
and docs/now/ is neither. The publisher adds it rather than failing the
gate.

Closes #6402

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
This was referenced Oct 6, 2026
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PR Dashboard

Generated at: 2026-10-06 14:29:02 UTC

Summary

Status Count
Total Open PRs 50
PRs with Failing Checks 36
PRs with All Checks Green 14
READY 0
FAILING 36
PENDING 0
NO CHECKS YET 0

These columns do not partition: 0 + 36 + 0 + 0 = 36, and there are 50 open PRs. A PR is being counted twice or not at all.

Seal Status

  • ⚠️ STALE -- sha256(compiler.rs)=3c78f3c7ffb7 != manifest seal=87e5cbd3ad94.
    The committed NMSE numbers were certified against an older compiler.rs.
    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

This was referenced Oct 6, 2026
@gHashTag
gHashTag enabled auto-merge (squash) October 7, 2026 07:25
@gHashTag
gHashTag merged commit 5a1c6e4 into master Oct 7, 2026
18 of 26 checks passed
gHashTag added a commit that referenced this pull request Oct 7, 2026
…that cannot fail (Refs #7393)

Two ports from the same 07:2xZ batch (#7211, #6875) landed six tests
whose body is only `assert true`, which trips the Corpus ratchet's
assertionless-test gate on every PR merged against master.

gft_dup3_jtag now ports the JTAG capture word (WORD v3) and checks it
against the Verilog's own power-on value 32'hA5A5343C. The five
`assert true` tests in check_catalog_integrity claimed behaviour the
stubbed port does not implement, so they are removed rather than
dressed up.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
gHashTag added a commit that referenced this pull request Oct 7, 2026
…ty (Closes #7473)

The Corpus ratchet's assertionless-test gate went red when two port PRs
landed placeholder tests: a3d5b41 (#7211, gft_dup3_jtag, 1) and
5a1c6e4 (#6875, check_catalog_integrity, 5). The tests stay; they now
assert something a mutant breaks.

gft_dup3_jtag states the readout the bitstream was built with: the v3
capture word, the 0xA5A5343C seed it equals when every clause holds, the
JTAG shift, the four clause predicates, the sticky rule, settle and the two
counters. check_catalog_integrity models the Python check's six rules over
the planted tree its --self-check builds, the eight controls of that
self-check, and main's exit-code wiring (T85b).

Lab (t27c 8628990, zig on PATH): gen/gen-verilog/gen-c/gen-rust ok for
both; test-report 10/10 and 10/10 with 0 vacuous passes; tri mutate spec
kills 50/51 and 61/61. The one survivor, `beats * LIVE_STRIDE` ->
`beats / LIVE_STRIDE`, is equivalent: the stride is 1.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
gHashTag added a commit that referenced this pull request Oct 7, 2026
…o gen-verilog lowers them (Closes #7393) (#7397)

* specs(port): nine batch-merged ports spell string arrays as [N]str, so gen-verilog lowers them (Closes #7393)

The 2026-10-07 07:21-07:29Z batch merged nine ports while their corpus
ratchet was red at an earlier step, so the suite never ran on them, and
master's lab suite has failed since 223c28c with 9 unexpected failures.

Eight declare a local string array the Zig way, `[N][]const u8`. The
Verilog guard reads the slice brackets as a second dimension and refuses
a 2-D array of aggregates (W469). The parameters these arrays are passed
to are already `[]str`; `[N]str` is t27's own spelling and every backend
lowers it. Zig output is unchanged; C goes from the invalid
`[]const u8 args[4]` to `const char* args[4]`, Rust from `Vec<const u8>`
to `[&'static str; 65]`. The anonymous struct return type in
enrichment/mod keeps `[4][]const u8`, because gen-zig copies that text
verbatim and `str` is not a Zig type.

gen_w391 bound a tuple element to `end` in two tests, which gen-verilog
declared as a bare keyword; the binding is now `stop`.

No ledger entry added; the cap stays at 77.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

* specs(port): gft_dup3_jtag and check_catalog_integrity carry no test that cannot fail (Refs #7393)

Two ports from the same 07:2xZ batch (#7211, #6875) landed six tests
whose body is only `assert true`, which trips the Corpus ratchet's
assertionless-test gate on every PR merged against master.

gft_dup3_jtag now ports the JTAG capture word (WORD v3) and checks it
against the Verilog's own power-on value 32'hA5A5343C. The five
`assert true` tests in check_catalog_integrity claimed behaviour the
stubbed port does not implement, so they are removed rather than
dressed up.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>

---------

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
gHashTag added a commit that referenced this pull request Oct 7, 2026
…ty (Closes #7473) (#7474)

The Corpus ratchet's assertionless-test gate went red when two port PRs
landed placeholder tests: a3d5b41 (#7211, gft_dup3_jtag, 1) and
5a1c6e4 (#6875, check_catalog_integrity, 5). The tests stay; they now
assert something a mutant breaks.

gft_dup3_jtag states the readout the bitstream was built with: the v3
capture word, the 0xA5A5343C seed it equals when every clause holds, the
JTAG shift, the four clause predicates, the sticky rule, settle and the two
counters. check_catalog_integrity models the Python check's six rules over
the planted tree its --self-check builds, the eight controls of that
self-check, and main's exit-code wiring (T85b).

Lab (t27c 8628990, zig on PATH): gen/gen-verilog/gen-c/gen-rust ok for
both; test-report 10/10 and 10/10 with 0 vacuous passes; tri mutate spec
kills 50/51 and 61/61. The one survivor, `beats * LIVE_STRIDE` ->
`beats / LIVE_STRIDE`, is equivalent: the stride is 1.

Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
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Port tools/check_catalog_integrity.py (Python, 4 functions) to specs/port/tools/check_catalog_integrity.t27

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