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gemv

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FP8 (E5M2 and E4M3, any pairing) GEMM, GEMV and fused AdamW for NVIDIA GPUs without native FP8 (sm_50–sm_87, Maxwell to Ampere): exact products, FP32 accumulation, TE HYBRID backward, C API and PyTorch bindings incl. torch._scaled_mm and Float8Tensor

  • Updated Oct 21, 2026
  • Cuda

NVFP4 GEMM, GEMV, linear layers and quantization for NVIDIA GPUs without native FP4 (sm_50–sm_90): every NVIDIA NVFP4 variant (ModelOpt, Transformer Engine 1x16 / 16x16, 4over6, swizzled scales) bit for bit, exact block sums, accumulation, C API and PyTorch bindings

  • Updated Oct 21, 2026
  • Cuda

C++/CUDA inference engine for Qwen2.5-Coder-0.5B, written from scratch: INT4 GEMV/GEMM kernels, Flash-Decoding, a 24-layer decode engine and lossless speculative decoding. Verified against Hugging Face; benchmarked against bandwidth ceilings, PyTorch and llama.cpp.

  • Updated Oct 11, 2026
  • Python

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