Skip to content

Port gHashTag/trinity:fpga/openxc7-synth/d_slow_blink.v (Verilog, 1 module) to specs/port/trinity/fpga/openxc7-synth/d_s - #5798

Merged
gHashTag merged 2 commits into
masterfrom
queen-5682
Oct 3, 2026
Merged

gHashTag merged 2 commits into
masterfrom
queen-5682

Conversation

@gHashTag

@gHashTag gHashTag commented Oct 3, 2026

Copy link
Copy Markdown
Owner

Closes #5682

Written by a bee on queen-5682 and published by tools/queen/publish.py. The branch itself is the bee's; the second commit is the coordination entry every pull request must add, which a bee has no way to know about.

1 file changed, 195 insertions(+)

🤖 Generated with Claude Code

Trinity Bee and others added 2 commits October 3, 2026 07:37
Create specs/port/trinity/fpga/openxc7-synth/d_slow_blink.t27 that
implements the trinity_top module with 24-bit counter and LED output.

The module implements a slow blink counter that toggles the LED every
2^23 clock cycles (approximately 6 Hz at 50MHz).

Closes #5682
A pull request must add exactly one docs/now entry and a bee has no way
to know that: its brief names a boundary file and acceptance criteria,
and docs/now/ is neither. The publisher adds it rather than failing the
gate.

Closes #5682

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
@github-actions

github-actions Bot commented Oct 3, 2026

Copy link
Copy Markdown
Contributor

📓 NotebookLM Notebook linked to this PR

This notebook contains session context, decisions, and artifacts for this work.

@github-actions

github-actions Bot commented Oct 3, 2026

Copy link
Copy Markdown
Contributor

PR Dashboard

Generated at: 2026-10-03 18:29:28 UTC

Summary

Status Count
Total Open PRs 50
PRs with Failing Checks 44
PRs with All Checks Green 6
READY 5
FAILING 44
PENDING 0
NO CHECKS YET 0

These columns do not partition: 5 + 44 + 0 + 0 = 49, and there are 50 open PRs. A PR is being counted twice or not at all.

Seal Status

  • ⚠️ STALE -- sha256(compiler.rs)=b45a356c2eb6 != manifest seal=87e5cbd3ad94.
    The committed NMSE numbers were certified against an older compiler.rs.
    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

@gHashTag
gHashTag merged commit 188884e into master Oct 3, 2026
27 of 31 checks passed
gHashTag added a commit that referenced this pull request Oct 3, 2026
…5776)

Five pull requests whose right verdict is known from outside the bee, each
pinned to its head: three ports the owner merged by hand, not reverted
(#5798, #5797, #5793), and #4498 and #5664, whose defects were established.
`reviewer.py eval` dry-runs them under the run lock, in its own state
directory, and appends one line per pull request to eval.jsonl with a hash of
the prompt and the model. The score counts an APPROVE on a known-bad head apart
from a safe miss and from no verdict. A head that moved reads `stale`; a red
required check reads `gate`. `eval --last` and `tri review golden` print the
newest score and run nothing.

The base branch's required-check read moves to Bee.required_for, so eval and
the queue read one rule. B2 (fewer reasoning tokens) is gated on this score.

163 checks; with the dry- reading, the bad-approve count and the stale test
removed, 3 fail.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
gHashTag added a commit that referenced this pull request Oct 3, 2026
…#5776)

An eval row now records `said`: the verdict each model wrote before the
runner's gates. The score counts apart a known-bad head that a model
approved and a gate or the second model stopped. In the B17 eval
(glm-4.5-flash first) the model approved #4498 and the person-path gate
held it; the old score filed that as "wrong without approving", crediting
the gate's catch to the model.

Golden #5798 moves from approve to changes: its issue's criterion
`t27c test-report ... | grep -c BLOCKED` prints 1 on its pinned head
(t27c emits `var a, var b = ...` for a destructure and zig rejects a
never-mutated var), so the runner's veto made `approve` unreachable.
The owner merged it by hand; the plan asks for the owner's word.

B17 result in the plan: 1 of 5 (2 of 5 relabelled), 3.5 min against 45;
not adopted as is.

177 checks; with `said` and the count reverted, 2 fail by name.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
gHashTag added a commit that referenced this pull request Oct 4, 2026
…(B16 gate) (Refs #5776)

The bee approved #5747 with `coverage` discounted while its log on the
head read "specs/boards/arty_a7.t27 changed since sealing", and #5757
with the corpus ratchet discounted as red on master while its log read
"+ LedConfig  NEW conflict" for a struct its own spec adds. pr_caused
reads the log tail the brief already holds; a line saying newly, NEW,
changed since or stale that names a path the head changes or a type its
added lines define turns the APPROVE into REQUEST_CHANGES before any
second model, with the line quoted as a blocking-check.

Self-test 188 checks; negative control: wiring removed in a /tmp copy,
exactly the two review checks fail by name. Replay over 26 kept briefs:
fires on #5747, #5757, #5797, #5798 only. Eval 00:23Z: no verdict
moved, approved-a-known-bad 0 by the models' variance, not the gate.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
gHashTag added a commit that referenced this pull request Oct 4, 2026
…5838) (Refs #5776)

The live bee approved #5838 and #5820 discounting `check` as "added by the
publisher, not the port" while the log read `FAIL docs/now/<entry>.md`, an
entry the head itself adds. A file master does not have cannot fail there,
so pr_caused now also blames a failure word (FAIL, error:, ##[error]) on a
line naming an added path. Replay over 30 kept briefs fires on `check` of
#5664, #5756, #5793, #5797, #5798 only; eval 5 of 7, approved a known-bad
head 0 with three model approvals stopped. Plan rows B19 (gh JSON gap) and
B20 (corpus-count gate, owner) added.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

Port gHashTag/trinity:fpga/openxc7-synth/d_slow_blink.v (Verilog, 1 module) to specs/port/trinity/fpga/openxc7-synth/d_slow_blink.t27

2 participants