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simd: saturating narrows down the 512-bit ladder (16x32 -> 32x16 -> 64x8) - #373
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…4x8) #372 merged at its first commit (e07be5b), whose narrow was off the ladder: I32x16 -> I8x16/U8x16, a 128-bit result. This replaces it with the ladder steps: - I32x16::narrow_saturating_i16(hi) -> I16x32 - I16x32::narrow_saturating_i8(hi) -> I8x64 - I16x32::narrow_saturating_u8(hi) -> U8x64 Lanes 0..N come from self, N..2N from hi, each clamped to the narrow range. Realized per backend: AVX-512 vpmovsdw/vpmovswb/vpmovuswb (u8 raises negatives to 0 first), AVX2/AVX SSE2 packs, NEON sqxtn/sqxtun, wasm narrow_i32x4/i16x8 (I16x32 comes from scalar there, so its narrows live in simd_wasm.rs and the scalar ones are gated off), scalar clamp, nightly simd_clamp + cast. aarch64 now re-exports the NEON I16x32/I8x64 the backend already carried. Nightly keeps F32x16::cast_i32 and I32x16::cast_f32. Parity group 0x10xx: edge sets plus 63 random rounds, chained i32->i16->i8/u8 against one clamp, in-range casts, anti-vacuity on saturated and kept lanes. 17 groups bit-identical on native v4, native v3, avx-qemu, v2-qemu, neon-qemu, wasm, wasm-scalar, nightly. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01G22yT6htkcdyXsihxxXdrg
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Summary
#372 merged at its first commit (e07be5b). That commit's narrow is off the 512-bit ladder:
I32x16 -> I8x16/U8x16, a 128-bit result. The ladder rework reached the #372 branch after the merge (dc26129), so it never landed. This PR applies that same diff to master: it removes theI8x16/U8x16narrow and adds the ladder steps on every backend.I32x16::narrow_saturating_i16(hi) -> I16x32I16x32::narrow_saturating_i8(hi) -> I8x64I16x32::narrow_saturating_u8(hi) -> U8x64Lanes
0..Ncome fromselfandN..2Nfromhi. Each lane is clamped to the narrow range.vpmovsdw/vpmovswb/vpmovuswb, thenvinserti64x4(u8 first raises negative lanes to 0)packssdw/packsswb/packuswbover 16-byte quarterssqxtn/sqxtun+vcombinei16x8_narrow_i32x4,i8x16_narrow_i16x8,u8x16_narrow_i16x8clampsimd_clamp+castTwo backend notes:
I16x32/I8x64/U8x64come from the scalar backend on wasm. Their narrows are therefore implemented insimd_wasm.rs, and the scalar versions are cfg-gated off for that arm.I16x32/I8x64(+i16x32/i8x64).simd_neon.rsalready had both types, but no arm re-exported them.Nightly keeps
F32x16::cast_i32andI32x16::cast_f32.Verification
git diff origin/masteron this branch equalsgit diff e07be5b dc26129(checked withdiff), so the measurements taken on dc26129 apply unchanged:0x10xxinsimd-masking-parity:as;0x1080, the u8 lane holdingi32::MIN.#[inline(never)]wrappers, release):vshufi64x2+ onevpackssdw/vpacksswb/vpackuswbper narrow;cargo clippy --lib -D warningsis clean on v4 and v3. The new doctests pass (v4, release).Generated by Claude Code