rtllm

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[DATE 2025] haven: hallucination-mitigated llm for verilog code generation aligned with hdl engineers

verilog code-generation llm verilogeval rtllm

ICRTL Benchmark: Industrial-level RTL design challenges for evaluating PPA optimization, code generation, and LLM applications in EDA.

benchmark evolution natural-language ppa eda rtl verilog system-verilog yosys ic-design vlsi-design rtl-design hardware-accelerator ai-agent verilogeval rtllm llm-benchmark spec-to-rtl

HollowPass: 127 RTLLM and VerilogEval designs that pass the testbench but are not equivalent to the reference, with Icarus replays.

benchmark verilog formal-verification testbench verilogeval rtllm hollowpass

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