MQT SyReC Synthesizer - A Tool for HDL-based Synthesis of Reversible Circuits
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Updated
Sep 5, 2026 - C++
MQT SyReC Synthesizer - A Tool for HDL-based Synthesis of Reversible Circuits
The Interactive Reversible Debugger (IRD) is an open-source debugging tool that enables step-by-step reversible execution of programs. Unlike traditional debuggers, IRD allows users to move both forwards and backwards in execution, making it easier to track state changes, debug complex logic, and analyze algorithm behavior
Moop Embedded Runtime - Quantum-ready substrate (40KB, no GC, 1M ops/sec)
Multi-prover formal verification of Certified Null Operations (CNO: programs provably computing nothing) and Observational Null Disclosure (OND: programs provably revealing nothing). Two co-equal, logically independent pillars verified across Coq, Lean 4, and Agda, with axiom counts and out-of-scope residue lists honestly surfaced.
Make operations reversible and auditable via Oblíbený
Rewind — Premier SDK de calcul nativement reversible pour Rust. Debugger temporel, portes Toffoli, types lineaires. Information is Sacred.
Energy-aware synthesis for adiabatic and reversible logic. Netlist in, verified circuit out, with the energy accounted for rather than asserted.
Energy-efficient AI architecture optimization through thermodynamic analysis and causal derivation
Proof-carrying Smithian Fold derivation and executable laboratory for classical and quantum computational sciences
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ARM Cortex-M emulator with time-travel debugging: snapshot, rewind, byte-equal replay.
Executable Kotlin models of catalytic-computation constructions, with deterministic oracle and exact tape-restoration tests.
REVO — Inference-Time Transformations (Research Prototype)
A point-free reversible programming language interpreted in Rel, and Q42, the same language over the complex numbers
NOOPgOLD: NEveryThing Organizing Optimizing Protocol geNERATING OLD into gOLD. The Ruliad-NOOP convergence, witness positioning, People’s Cloud, CH341A firmware liberation, WItsWAlkErWOrld.
CARMEN-Q: exact causal audit-return bounds and reproducible quantum-memory benchmarks
Measurements on the ECDSA.fail benchmark, the leanest known reversible circuit for secp256k1 point addition: the search cost the score does not count. The circuit is the community's; the instruments are mine, including a validated 9.2x checker and a classical pre-filter. Three findings filed upstream. Built with help from Claude Code.
Logic gates and a 4-gate priority-encoder pipeline built from nothing but Newtonian point-mass gravity
LSP-1 : Architecture memcomputing full-stack bio-mimétique. Remplace le courant électronique par le transport protonique (Grotthuss) et les solitons de Davydov. Utilise la frustration géométrique du réseau de Kagome pour atteindre une efficacité proche de la réversibilité thermodynamique.
A reversible 4-bit Fibonacci circuit implemented in Qiskit.
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