qcom: add clk-pwm support and fix Ethernet and RS-485 handling - #590
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RadxaSongjun wants to merge 5 commits into
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qcom: add clk-pwm support and fix Ethernet and RS-485 handling#590RadxaSongjun wants to merge 5 commits into
RadxaSongjun wants to merge 5 commits into
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Clock outputs do not guarantee a defined pin level when the clock is disabled, and some clock providers cannot represent exact 0% or 100% duty cycles. Add optional GPIO and pinctrl support. Use the GPIO to drive constant levels when the PWM is disabled or configured for 0% or 100% duty cycle, and select the clock function for normal PWM output. Link: radxa@8975042 Signed-off-by: Xilin Wu <sophon@radxa.com> Signed-off-by: Songjun Li <lisongjun@radxa.com>
The SA8775P GP clock frequency table only provides 100 MHz and 200 MHz rates, which cannot satisfy low-frequency PWM consumers. Add 1, 5, 10, 20 and 100 kHz configurations derived from the 19.2 MHz TCXO. Use clk_rcg2_ops for the GP clock sources so clk-pwm can configure the output duty cycle. The 10 kHz and 20 kHz rates are used by the VMARC-Q9075 fan and display backlight respectively. Signed-off-by: Songjun Li <lisongjun@radxa.com>
Signed-off-by: Songjun Li <lisongjun@radxa.com>
Switching between 1Gbps and 2.5Gbps can leave the QCOM ETHQOS MAC and PCS in a state where the PHY ID cannot be read and the link cannot be restored. Track the previously configured link speed and request an adapter reset when the speed changes to or from 2.5Gbps. Skip the reset for the initial link setup. Expose stmmac_request_reset() so the platform driver can schedule the existing stmmac service-task reset instead of resetting the device directly from the MAC link-up callback. This restores link operation across 1Gbps and 2.5Gbps transitions. Signed-off-by: Songjun Li <lisongjun@radxa.com>
The RS-485 configuration callback forces RTS to a fixed level when RS-485 mode is enabled. This ignores SER_RS485_RTS_AFTER_SEND and can leave the transceiver in transmit mode while the bus is idle. Initialize RTS according to SER_RS485_RTS_AFTER_SEND when RS-485 mode is enabled. Reapply the configured idle level during startup so the state is restored after port setup or power cycles. Signed-off-by: Songjun Li <lisongjun@radxa.com>
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This PR adds clock-based PWM support for SA8775P/QCS9075 and includes
fixes for Ethernet speed transitions and GENI UART RS-485 operation.