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Add CAMSS and CSIPHY DT for Hawi - #1947
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Mukesh Ojha (mukeshojha-linux) merged 4 commits intoOct 8, 2026
Merged
Mukesh Ojha (mukeshojha-linux) merged 4 commits into
Mukesh Ojha (mukeshojha-linux) merged 4 commits into
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Add dtsi to describe the Hawi CAMSS and CSIPHY block 3 x TPG 3 x CSID 2 x CSID Lite 3 x IFE 2 x IFE Lite 6 x CSIPHY Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> Co-developed-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com> Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260923-hawi-maili-camss-v1-7-cbbb42e534ef@oss.qualcomm.com/
Qualcomm Hawi SoC has three Camera Control Interface (CCI). Each controller contains two I2C hosts. Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260923-hawi-maili-camss-v1-8-cbbb42e534ef@oss.qualcomm.com/
Define pinctrl definitions to enable camera master clocks on Hawi. Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260923-hawi-maili-camss-v1-9-cbbb42e534ef@oss.qualcomm.com/
…i MTP Enable the camera subsystem on the Hawi MTP along with the S5KJN5 sensor connected to CSIPHY2 through I2C0 CCI1. Add the camera master clock and sensor reset pin states on the TLMM GPIOs. Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> Co-developed-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260923-hawi-maili-camss-v1-10-cbbb42e534ef@oss.qualcomm.com/
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Nihal Kumar Gupta (nihal231998)
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October 7, 2026 13:40
Mukesh Ojha (mukeshojha-linux)
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This series adds Camera Subsystem DT support for Hawi:
CRs-fixed: 4701394