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Hawi support - #1933
Hawi support#1933
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Add support for the Qualcomm Maili SoC to the protection domain mapper. Maili shares the same protection domain configuration as Kaanapali, so reuse the existing Kaanapali domain data. Link: https://lore.kernel.org/all/20260819054203.61385-3-prasad.kumpatla@oss.qualcomm.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
…playback During back-to-back speaker playback the PA sometimes fails to enable because a few I2S/TDM and clock source registers retain their previous state and are not reprogrammed on the next stream. Reset the relevant I2S/TDM, clock source and bandgap override registers in hw_free() so the codec is torn down cleanly and the speaker amplifier comes up reliably on back-to-back use cases. Move the bandgap override reset out of set_sysclk() into the teardown path where it belongs. Link: https://patch.msgid.link/20260923084627.748920-2-prasad.kumpatla@oss.qualcomm.com Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
Maili ships its own firmware, so its topology file has to live in a separate maili/ firmware directory. The topology load path is derived from the sound card driver_name, so reusing the Hawi data would look up the topology under hawi/ instead. Add a dedicated maili_priv_data with driver_name "maili" for the qcom,maili-sndcard compatible so the topology is loaded from the maili/ directory. It keeps the same DAPM widgets and enables codec sysclk, MI2S BCLK and WCD jack detection for the Maili audio pipeline. Link: https://patch.msgid.link/20260923084627.748920-3-prasad.kumpatla@oss.qualcomm.com Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
Add compatibles for the RX, TX and VA macro codecs found in the Low Power Audio SubSystem (LPASS) of the Qualcomm Maili SoC. The Maili RX, TX and VA macros are identical to their Hawi counterparts, so document them with the corresponding Hawi compatible as fallback. Link: https://patch.msgid.link/20260923084627.748920-4-prasad.kumpatla@oss.qualcomm.com Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
…clock Add a binding for the Qualcomm LPASS VA CSR rate generator node that exposes the lpass_heartbeat_pulse clock on Hawi. The HeartBeat Pulse, also known as RateGen Pulse, synchronizes the start of DMAs and Codec Interfaces for the audio usecase and can serve as a periodic wakeup source for the DSP. Require the LPASS LPR and audio vote clocks to access VA CSR register space safely. Signed-off-by: Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260928-master-v9-1-2277f09f9a09@oss.qualcomm.com
The HeartBeat Pulse, also known as RateGen Pulse, synchronizes the start of DMAs and Codec Interfaces for the audio usecases and can serve as a periodic wakeup source for the DSP. Add the LPASS VA CSR driver that models the rate generator as a clock provider so consumers can enable and disable it through the common clock framework. Attach the DT vote clocks to runtime PM and resume the device before programming the rate generator registers in probe. Also take a runtime PM reference from the clock prepare path so later enable and disable register accesses happen only while the LPASS votes are active. Signed-off-by: Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com> Link: https://patch.msgid.link/20260928-master-v9-2-2277f09f9a09@oss.qualcomm.com
…ring LPASS_CODEC_VERSION_2_9 is detected by lpass-va-macro.c and consumed by lpass-wsa-macro.c, but lpass_macro_get_codec_version_string() never learned about it, so the probe log reports "LPASS Codec Version NA" on those parts. Add the missing case. Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Ajay Kumar Nandam <ajay.nandam@oss.qualcomm.com> Link: https://patch.msgid.link/20260922-add_shikra_support-v1-2-6c6cb6444caf@oss.qualcomm.com
Document compatibles for the RX, TX and VA macro codecs found in the Low Power Audio SubSystem (LPASS) of the Qualcomm Hawi SoC. All three macros differ from SM8550, so describe them as standalone compatibles with their own clock constraints rather than as SM8550 fallbacks: the RX macro uses the 'lpr' clock instead of the 'macro' clock, the TX macro is based on Bolero v4.0, and the VA macro takes an additional "heartbeatpulse" clock sourced from the LPASS VA CSR rate generator. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Link: https://patch.msgid.link/20260922-add_shikra_support-v1-6-6c6cb6444caf@oss.qualcomm.com Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
Hawi integrates the Bolero v4.0 TX macro, which extends the v9.x TX macro with a port-select stage in the SWR microphone input path and an adaptive filter (ADPT) block. Add the additional CFG2 mux registers and per-path CFG2 registers to the register map, extend the maximum register offset to cover the new ADPT control register, and describe the new v4.0 decimator, SWR microphone, WSA and port-select mux widgets and their routes. The ADPT block has to be disabled before a decimator is enabled. This register only exists on v4.0, so gate the write on a has_adpt flag set from the match data rather than issuing it unconditionally. Add the "qcom,hawi-lpass-tx-macro" compatible and its match data to select the new widgets and routes. Co-developed-by: Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com> Signed-off-by: Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Link: https://patch.msgid.link/20260922-add_shikra_support-v1-7-6c6cb6444caf@oss.qualcomm.com Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
Hawi and Maili use the LPASS codec v4.0, which the macro drivers do not yet recognise. Add LPASS_CODEC_VERSION_4_0 and its "v4.0" version string, and detect it in the VA macro when the hardware reports major version 4, minor 0. The RX macro register layout of LPASS codec v4.0 matches the v2.5+ layout, so reuse the existing v2.5 register access helpers, controls, widgets and register defaults for it. Unlike v4.1, v4.0 does not need the FS counter bypass or the adaptive filter blocks, so those stay keyed off v4.1 only. Add the "qcom,hawi-lpass-rx-macro" and "qcom,hawi-lpass-va-macro" compatibles, both pointing at the sm8550 match data, so the version is read back from the hardware at probe. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Link: https://patch.msgid.link/20260922-add_shikra_support-v1-8-6c6cb6444caf@oss.qualcomm.com Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
Add new dai ids entries for Qualcomm Audio Interface (QAIF) AIF MI2S and TDM audio lines. Co-developed-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com> Signed-off-by: Harendra Gautam <harendra.gautam@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Tested-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260918-qaif_dai_id_support-v1-1-ed863c0e5e45@oss.qualcomm.com
…2S and TDM dais Add support for Qualcomm Audio Interface (QAIF) AIF MI2S and TDM dais in the dai-driver, these dais are used in Shikra, Hawi and Nord based Qualcomm platform devices. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Tested-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260918-qaif_dai_id_support-v1-2-ed863c0e5e45@oss.qualcomm.com
Handle AIF MI2S and TDM DAI IDs in the SC8280XP machine driver and extend LPASS_MAX_PORT to accommodate the additional audio interfaces. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Tested-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260918-qaif_dai_id_support-v1-3-ed863c0e5e45@oss.qualcomm.com
… LPI pinctrl Add bindings for the pin controller in Low Power Audio SubSystem (LPASS) of Qualcomm Hawi SoC. The controller has 23 GPIOs (gpio0-gpio22) with functions including SoundWire, I2S, DMIC, VA I2S, ext_mclk1, slimbus and lpass_lpi_dbg_clk. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260821113548.2686650-2-prasad.kumpatla@oss.qualcomm.com
Add pin controller driver for the Low Power Audio SubSystem (LPASS) Low Power Island (LPI) of Qualcomm Hawi SoC. The controller has 23 GPIOs with SoundWire, I2S, DMIC, VA I2S, ext_mclk1 and slimbus mux functions. Two pins (gpio13, gpio22) require 6 mux slots due to a test_bus entry occupying a middle hardware slot. Add LPI_PINGROUP6 macro to pinctrl-lpass-lpi.h to support pins with 5 alternate functions. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260821113548.2686650-3-prasad.kumpatla@oss.qualcomm.com
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🔨 Build Failure Analysis — PR #1933PR: #1933
VerdictThis is NOT a compilation failure. The build failed during the automerge phase when attempting to merge the PR branch 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #1933PR: #1933
Verdict2 of 7 merge conflicts are introduced by this PR; 5 are pre-existing. The build failed during automerge before compilation started - no compilation errors exist. 📎 Detailed analysis: Full report |
PR #1933 — validate-patchPR: #1933
Final Summary
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PR #1933 — checker-log-analyzerPR: #1933
Detailed report: Full report
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🔨 Build Failure Analysis — PR #1933PR: #1933
Verdict2 of 7 merge conflicts are introduced by this PR; 5 are pre-existing integration conflicts in the baseline. Note: This is not a compilation failure. The build failed during the automerge step when integrating topic branch 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #1933PR: #1933 Build Status: ❌ Automerge Failure (No Compilation Attempted)The build failed during the automerge phase when attempting to integrate the PR with the baseline branch
Verdict0 of 7 merge conflicts are definitively caused by this PR. The build failure is primarily due to pre-existing conflicts in the baseline integration branch ( This is NOT a compilation error — the kernel build never started because the automerge step failed first. 📎 Detailed analysis: Full report |
PR #1933 — validate-patchPR: #1933
Final Summary
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PR #1933 — checker-log-analyzerPR: #1933
Detailed report: Full report
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3 participants
Hawi/Maili Audio Support enabled.