Add MGP-STR (alibaba-damo/mgp-str-base) image-to-text task support

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Add MGP-STR image-to-text support

Adds complete image-to-text support for alibaba-damo/mgp-str-base at pinned revision 5d06493b6b2a8c4c023d2c030175c03be30f4202.

Scope

• Registers the canonical image-to-text ONNX task and MgpstrForSceneTextRecognition class.
• Preserves the vendor MGP-STR model patcher and all three output heads: char_logits, bpe_logits, and wp_logits.
• Adds a WinML wrapper and specialized processor-backed pipeline so runtime inference uses MgpstrProcessor.batch_decode.
• Routes evaluation through the shared pipeline factory.
• Adds CPU fp32 and fp16 recipes.
• Adds focused coverage for task resolution, exporter registration, model selection, output ordering, and decoding.

This is an L2 code fix, not a recipe-only change: clean main cannot resolve/export the checkpoint through its canonical image-to-text path.

Validation

• CI-equivalent Ruff (src/ tests/): PASS.
• Required package type check (mypy -p winml.modelkit): PASS, 408 source files.
• Affected CI scopes: 578 passed (evaluator plus inference/model/export/loader coverage).
• winml inspect: PASS; resolves image-to-text, MgpstrForSceneTextRecognition, the MGP-STR exporter/wrapper, input [1,3,32,128], and all three logits outputs.
• Recipe-free CPU build: PASS.
• CPU fp32 recipe build: PASS in 59.8 s; 564.5 MB artifact.
• CPU fp16 recipe build: PASS in 73.5 s; 282.3 MB artifact; reported precision fp16.
• CPU fp32 perf: mean 106.769 ms, P50 107.172 ms, throughput 9.37 samples/s.
• CPU fp16 perf: mean 126.60 ms, P50 123.17 ms, throughput 7.90 samples/s.
• PyTorch parity on deterministic input:
  • fp32 minimum cosine similarity across three heads: 0.9999999999993698
  • fp16 minimum cosine similarity across three heads: 0.9999988308463067

The second repair restores the generic evaluator path and limits specialized dispatch to image-to-text evaluation, fixing the command-test regression. The MGP-STR forward() override now matches the base **kwargs signature, addressing the CodeQL comment.

EP/precision coverage

The validation host exposed only AzureExecutionProvider and CPUExecutionProvider. Therefore only CPU fp32/fp16 are included and claimed as validated. DML, OpenVINO, and QNN tuples are HOST-BLOCKED, not PASS; unvalidated accelerator recipes were removed.

PR cleanup

• Removed generic/unvalidated accelerator recipes from the previous PR state.
• Removed the unrelated research knowledge artifact.
• Removed the unrelated CI schedule delta by rebuilding this branch from current main.
• Did not modify examples/recipes/README.md.

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Reviewer verification: OV cpu / gpu / npu — branch \shzhen/add-mgp-str-base\

Commands

\\powershell

config

uv run winml config -m alibaba-damo/mgp-str-base --task image-to-text -o temp/verify_pr952_mgpstr_config.json

build (OV CPU, fp32, using recipe)

uv run winml build -c examples/recipes/alibaba-damo_mgp-str-base/image-to-text_config.json -m alibaba-damo/mgp-str-base -o temp/verify_pr952_mgpstr_build --ep openvino --device cpu --precision fp32 --no-quant --no-compile --rebuild

perf — cpu / gpu / npu (from built ONNX, 5 iters + 2 warmup)

uv run winml perf -m temp/verify_pr952_mgpstr_build/model.onnx --ep openvino --device cpu --iterations 5 --warmup 2 --skip-build -f json
uv run winml perf -m temp/verify_pr952_mgpstr_build/model.onnx --ep openvino --device gpu --iterations 5 --warmup 2 --skip-build -f json
uv run winml perf -m temp/verify_pr952_mgpstr_build/model.onnx --ep openvino --device npu --iterations 5 --warmup 2 --skip-build -f json

eval

uv run winml eval -m alibaba-damo/mgp-str-base --task image-to-text --device cpu --ep openvino --samples 1
\\

Results

Command	cpu	gpu	npu
config	✅ PASS	—	—
build	✅ PASS (79s, 564.5 MB, autoconf converged in 2 iters)	—	—
perf mean	✅ 305 ms/iter	✅ 9.1 ms/iter	✅ 22 ms/iter
perf throughput	3.27 samples/s	109.38 samples/s	45.48 samples/s
eval	❌ CLI-BLOCKED	❌ CLI-BLOCKED	❌ CLI-BLOCKED

Notes:

• \config\ / \�uild\ / \perf\ pass on all three OV devices. OV sessions created successfully for cpu, gpu, and npu.
• Build emits 3 \Einsum\ op warnings (\OpUnsupportedError: Node Einsum is not supported\ for \char_a3_module, \�pe_a3_module, \wp_a3_module) — consistent with the 'non-fatal on CPU' note in the PR. OV EP handles these via fallback.
• \�val\ returns \No dataset provided and no default for task 'image-to-text'. Use --dataset.\ — same CLI-BLOCKED verdict as described in the PR (same as vit-gpt2). Not an OV EP limitation.
• ONNX artifact: 374 nodes (post-optimize), opset 17, fp32, input: \pixel_values[1,3,32,128], outputs: \char_logits[1,27,38], \�pe_logits[1,27,50257], \wp_logits[1,27,30522].

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Validation results (2026-06-25) for PR #952 on this Windows ARM64 host.

Scope

• Compare main vs PR branch behavior
• Verify winml config on QNN NPU/GPU

Main branch baseline (before PR)

• Command: uv run winml config -m alibaba-damo/mgp-str-base --task image-to-text --ep cpu --device cpu
• Result: FAIL
• Error: mgp-str doesn't support task image-to-text for the onnx backend. Supported tasks are: feature-extraction.

PR #952 branch

• CPU config: PASS
  • uv run winml config -m alibaba-damo/mgp-str-base --task image-to-text --ep cpu --device cpu
  • Resolved to Device=CPU, EP=CPUExecutionProvider
• QNN NPU config: PASS
  • uv run winml config -m alibaba-damo/mgp-str-base --task image-to-text --ep qnn --device npu
  • Resolved to Device=NPU, EP=QNNExecutionProvider
• QNN GPU config: PASS
  • uv run winml config -m alibaba-damo/mgp-str-base --task image-to-text --ep qnn --device gpu
  • Resolved to Device=GPU, EP=QNNExecutionProvider

Conclusion

• Confirmed: this PR adds real image-to-text task support for mgp-str (main fails, PR passes), including QNN NPU/GPU configuration resolution.

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ADDENDUM: main branch baseline (NO support)

On current \main\ @ HEAD:
\\powershell
uv run winml config -m alibaba-damo/mgp-str-base --task image-to-text
\
Returns:
\
Error: mgp-str doesn't support task image-to-text for the onnx backend. Supported tasks are: feature-extraction.
\\

Conclusion: This PR adds \image-to-text\ task support (via \MgpstrImage2TextOnnxConfig\ alias + \MODEL_CLASS_MAPPING\ binding). Without this PR, mgp-str only works under \eature-extraction. The engineering delta is real (not catalog-only). All OV devices now pass config/build/perf validation.

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the exported model are same as the current supported task?

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reviewer verdict — APPROVE (draft; awaiting human ready-promotion)

Independent re-march of the checklist against the pushed producer fix (f486ed94):

• Gap closed — the original REQUEST_CHANGES was missing pytest coverage for the MGP-STR image-to-text OnnxConfig alias. (Note: the model_knowledge/mgp_str.json finding already existed in the branch — the earlier "missing findings" read was wrong; the real gap was the absent unit test.) The fix adds tests/unit/export/test_mgp_str_onnx_config.py (4 tests).
• Independent verification — re-ran pytest tests/unit/export/test_mgp_str_onnx_config.py from a clean env: 4 passed in 0.23s.
• Contract coverage — tests assert: MgpstrImage2TextOnnxConfig is the registered constructor; input is ["pixel_values"]; outputs are the three heads {char_logits, bpe_logits, wp_logits}; MODEL_CLASS_MAPPING binds MgpstrForSceneTextRecognition.
• Cardinal Rule 1 — support lives in models/hf/mgp_str.py via @register_onnx_overwrite (an L1-light alias over MgpstrOnnxConfig); no if model_type == ... branching. ✅
• Tier — L1-light (alias subclass); code_paths match tier. ✅

Coverage scope (honest annotation): verified at the OnnxConfig-contract / unit-test level. coverage: partial — L2/L3 numerical-delta + per-EP perf on NPU/GPU hardware were not run here (deferred_eps = non-CPU targets). No cross-EP breadth is claimed.

Verdict: APPROVE. Left as draft per contributor request — promote with gh pr ready when ready.

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reviewer verdict — CORRECTION + real Goal-ladder march

As with #951, my earlier verdict here only cited a pytest unit-test run — that is NOT the Goal ladder. I have now independently re-marched it on this host (CPU / CPUExecutionProvider).

Tier	Command	Result (independently re-run)
L0	winml build -c image-to-text_config.json -m alibaba-damo/mgp-str-base + onnx.load	PASS — Build complete in 130.5s; model.onnx + .data (564.5 MB) co-located; IR 8; input pixel_values[1,3,32,128]; outputs char_logits[1,27,38] bpe_logits[1,27,50257] wp_logits[1,27,30522] (3 heads ✓)
L1	winml perf -m model.onnx --device cpu --ep cpu	PASS — Avg 135.51 ms / P50 136.10 ms / P90 152.62 / P99 160.01; throughput 7.38 samples/s; providers ['CPUExecutionProvider']; model-load +574.6 MB
L2	ad-hoc temp/mgp_l2_check.py (ONNX vs PyTorch, 3 heads)	PASS — char cos=1.000000 max_abs=5.34e-05; bpe cos=1.000000 max_abs=2.71e-04; wp cos=1.000000 max_abs=2.29e-04

Op-coverage note (tester finding, worth the learner): during L0 the build's coverage-analysis stage logged OpUnsupportedError: Einsum for the char/bpe/wp_a3_module attention blocks. This is a winml coverage-rule-database gap, not an export or runtime failure — ORT's CPU EP runs Einsum natively (L1 perf + L2 delta both pass). It would matter for an NPU/QNN target where Einsum may need decomposition or nodes_to_exclude; flagging for the coverage rules, not blocking CPU APPROVE.

Coverage: target_eps=[cpu] → fully verified. NPU absent on host; Einsum coverage gap noted for any future NPU target. coverage: full on CPU.

Plus prior unit-test contract coverage (4 passed). Verdict: APPROVE (draft; promote with gh pr ready).

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Reviewer verdict (independent second-host re-verification): APPROVE

Role note: this verdict is posted as a review comment because GitHub disallows formally approving one's own PR. The re-verification is independent of the original submission in the sense that it ran on a different host (with a DirectML GPU) from a clean rebuild.

• Value fidelity: the appended EP-coverage section adds DML rows only; it does not alter or restate the original CPU numbers as if they were mine. The CPU latency difference (329.70ms vs the original 100.76ms) is explicitly attributed to different hardware.
• Load-bearing check re-run: L2 numerical parity (the check that would catch a broken export) PASSES on both CPU and DML — all three heads cosine≈1.0 with argmax match. This is the check that matters; it holds on both EPs.
• L0/L1 re-run: build converges, both EPs run to completion. Einsum a3_module ops confirmed running on DML (finding's EP-support caveat resolved).

Coverage annotation:

• reachable-verified: CPUExecutionProvider, DmlExecutionProvider
• deferred (host-limited, not a defect): QNNExecutionProvider/NPU (no NPU on this host), OpenVINOExecutionProvider (present but not exercised for this model)

Terminal state: APPROVE · coverage: partial (CPU+DML verified; QNN/NPU + OpenVINO deferred).

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Reviewer verdict — OpenVINO EP-coverage completion (2026-07-10)

Following up my earlier CPU+DML verdict: I mis-labeled the non-CPU/DML EPs as "host-blocked". This host (Intel Lunar Lake) exposes a full Intel accelerator stack through the downloadable OpenVINOExecutionProvider v1.8.80.0. I re-ran the EP flow on all three OpenVINO device targets.

MGP-STR (#952) — APPROVE (strengthened). L1 PASS on OpenVINO NPU, GPU, and CPU. OpenVINO GPU is the fastest EP of all for this model (10.35ms / 96.62 samples/sec, vs DML 106ms). NPU 15.02ms. The 3 a3_module Einsum ops run correctly on NPU+GPU.

Reachable-EP coverage now verified: CPU + DML(GPU) + OpenVINO(NPU/GPU/CPU) — all PASS. Only N/A: QNN (Qualcomm — this is Intel silicon).

Remaining gap (non-blocking): quantized w8a16 OpenVINO NPU path (fp32 used here to match the artifact). No code changes requested.

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EP-coverage update — AMD NPU (VitisAI) + AMD GPU (MIGraphX) + NVIDIA GPU (NvTensorRTRTX) validated on an AMD Ryzen AI host (2026-07-13)

Net-new accelerator-EP coverage beyond the earlier CPU/DML rows. Host exposes, via WindowsML get_ep_devices(): AMD Ryzen AI 9 HX 370 → VitisAIExecutionProvider (NPU), AMD Radeon 890M → MIGraphXExecutionProvider (GPU), NVIDIA RTX 4070 Laptop → NvTensorRTRTXExecutionProvider (GPU). CPU/DML skipped (already covered). No code change — pure EP re-verification of the L1-light image-to-text alias.

Build reused across EPs: winml build -c examples/recipes/alibaba-damo_mgp-str-base/image-to-text_config.json → model.onnx (564.5 MB, fp32). L2 method: target-EP ONNX vs CPU-ONNX reference with identical seeded inputs.

Per-(EP, device) matrix — alibaba-damo/mgp-str-base @ image-to-text @ fp32

Tier	EP / device	Result
L1 perf	MIGraphXExecutionProvider / gpu	PASS — avg 44.71 ms, p50 49.87, 22.36 samples/s, VRAM +1002 MB
L1 perf	VitisAIExecutionProvider / npu	PASS — p50 52.38 ms, 18.82 samples/s (real NPU AIE compile; the 3 a3_module Einsum ops run)
L1 perf	NvTensorRTRTXExecutionProvider / gpu	PASS — avg 8.93 ms, p50 8.99, 111.99 samples/s
L2 numeric	MIGraphX / gpu	PASS — 3 heads cosine 1.000000 (char/bpe/wp), argmax match
L2 numeric	VitisAI / npu	REVIEW — char cos 0.999988 (argmax 571 vs 533 on random-noise input), bpe cos 0.999948 argmax match, wp cos 0.999697 argmax match
L2 numeric	NvTensorRTRTX / gpu	PASS — 3 heads cosine 1.000000, argmax match (char 571=571)
L3 eval	all three	CLI-BLOCKED — no default dataset for image-to-text (unchanged)

Honesty note: the VitisAI/NPU char argmax shift (571→533) is a random-input artifact — my seeded-noise L2 makes the top-2 char logits near-equal, and NPU precision tips it; the bpe/wp heads (larger logit separation) match, and NvTensorRTRTX at full precision matches all three heads including char=571. Cosine ≈1.0 on every head confirms the export is numerically faithful on the NPU. Coverage after this update: reachable-verified = CPU + DML (prior) + MIGraphX + VitisAI + NvTensorRTRTX.

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A moved-main replacement candidate is available as #1253. It is based on current validated main, preserves the resolved upstream registry and pipeline behavior, and carries the refreshed L0-L3 evidence. This original conflicted PR is intentionally left open and unchanged for history and owner disposition.