Reduce memory access and bounds checks in CPU Col2im - #32698
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Stern (Hosi121) wants to merge 1 commit into
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Copilot review overview
🟢 Approval recommended
The localized optimization preserves accumulation semantics and has comprehensive regression coverage.
Review effort: Balanced
Findings: None
What changed in this PR
Optimizes FP32 CPU NCHW Col2im while preserving numerical behavior and memory safety.
Changes:
- Adds a specialized 2×2, stride-2 fast path.
- Hoists fallback bounds calculations outside the inner loop.
- Adds layout, special-value, grouping, bias, and batching tests.
| File | Description |
|---|---|
onnxruntime/core/util/math_cpu.cc |
Implements the optimized Col2im paths. |
onnxruntime/test/framework/math_test.cc |
Adds correctness and guard-buffer tests. |
onnxruntime/test/providers/cpu/nn/conv_transpose_op_test.cc |
Tests integration with grouped, batched ConvTranspose. |
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Description
Reduce memory access and bounds checks in the FP32 CPU NCHW
Col2imfunction used byConvTranspose.The change keeps the existing GEMM, thread settings, model, and API. It adds no allocation. The full GEMM result buffer remains allocated.
Motivation and Context
The PP-OCRv6 tiny detector uses two 2x2, stride-2
ConvTransposenodes. Their weights have shapes[16,16,2,2]and[16,1,2,2]. A runtime profile confirms that both nodes use the CPU implementation.The table shows time reductions against main at
09dfa6ad06ed8072b2fbe57687d4f71c7914b025. Each value is the median of five comparisons with new process pairs. The operator rows include GEMM, Col2im, bias, and session overhead. The model rows include the full detector session.Measured on an Intel Core Ultra 7 255H under Linux x86-64/WSL2. Both source builds use GCC 13.3, Release
-O3, and CPU EP. They do not use-march=nativeor fast math. The C++ runner timesSession::Run. Both processes have the same CPU affinity, full graph optimization, and thread settings. Worker spinning is disabled. Timed blocks alternate A/B and B/A after warmup.Four-thread times vary. For the unchanged-library A/A control on OCR 736, the median apparent changes were 2.1% with one thread and 1.0% with four threads. The one-cell operator case takes about 1 microsecond; the full sweep measured an increase below 0.1 microsecond. The reports include all 34 sweep configurations, all repeated measurements, other shapes, and the MobileNetV2 control. ARM and GPU performance were not measured.
Build steps, pinned inputs, all times, and raw reports.
Validation: