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Add jagged_index_select_2d_forward XPU operator - #92

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dvrogozh merged 10 commits into
intel:mainfrom
aagalleg:flezaalv/refactor_jagged_index_select_2D
Aug 28, 2026
Merged

dvrogozh merged 10 commits into
intel:mainfrom
aagalleg:flezaalv/refactor_jagged_index_select_2D

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@flezaalv

@flezaalv flezaalv commented Jul 20, 2026 •

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This commit introduces the jagged_index_select_2d_forward operator for Intel XPU devices, enabling 2D index selection on jagged tensors with offset-based indexing.

Changes

New SYCL Kernel Implementation (jagged_index_select_2d.cpp/h)

  • Implements JaggedIndexSelect2dKernel functor for SYCL/XPU execution

Operator Registration (ops_registry.cpp)

  • Register schema in fbgemm namespace
  • PyTorch dispatcher integration for XPU backend

Build Integration (CMakeLists.txt)

  • Add SYCL kernel source to build system

cc: @aagalleg, @manuelhsantana

@flezaalv flezaalv changed the title Flezaalv/refactor jagged index select 2 d Add jagged_index_select_2d_forward XPU operator Jul 20, 2026
@aagalleg
aagalleg force-pushed the flezaalv/refactor_jagged_index_select_2D branch from c641b23 to 8114ad5 Compare July 22, 2026 20:59
@flezaalv

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This commit introduces the jagged_index_select_2d_forward operator for Intel XPU devices, enabling 2D index selection on jagged tensors with offset-based indexing.

Depends on #87.

Changes

New SYCL Kernel Implementation (jagged_index_select_2d.cpp/h)

  • Implements JaggedIndexSelect2dKernel functor for SYCL/XPU execution

Operator Registration (ops_registry.cpp)

  • Register schema in fbgemm namespace
  • PyTorch dispatcher integration for XPU backend

Build Integration (CMakeLists.txt)

  • Add SYCL kernel source to build system

cc: @aagalleg, @manuelhsantana

Added upstream FBGEMM test coverage for jagged_index_select_2d on XPU by
extending packages/fbgemm-xpu/test/patches/0001-Add-XPU-support-to-fbgemm-tests.patch
to route fbgemm_gpu/test/jagged/jagged_index_select_2d_test.py through the XPU
device when running against upstream FBGEMM.

@flezaalv
flezaalv force-pushed the flezaalv/refactor_jagged_index_select_2D branch from b936395 to f134ba6 Compare August 27, 2026 21:34
@flezaalv

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Latest changes:

CI (.github/workflows/ci.yml)

  • Run jagged_index_select_2d_test.py in the Test fbgemm-xpu step

Documentation (README.md)

  • List jagged_index_select_2d_forward among the implemented operators

Validation

@flezaalv
flezaalv marked this pull request as ready for review August 27, 2026 23:53
@dvrogozh
dvrogozh requested review from aagalleg and mkrze August 28, 2026 15:00
Comment thread .github/workflows/ci.yml Resolved
Comment thread packages/fbgemm-xpu/README.md Resolved
@dvrogozh

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Also, please, rebase as there is a conflict in the patch file due to recently merged PRs.

@flezaalv
flezaalv requested a review from molintc as a code owner August 28, 2026 18:05
flezaalv and others added 10 commits August 28, 2026 18:11
Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>
Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>
Update device selection order in the test patch to check for XPU
availability first, then fall back to CPU or CUDA. This ensures XPU
tests run on XPU hardware when available, rather than defaulting to
CPU even when XPU is present.

Changes the device logic from:
  "cpu" if use_cpu else ("xpu" if xpu_available else "cuda")
to:
  "xpu" if xpu_available else ("cpu" if use_cpu else "cuda")
…2d tests

Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>
Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>
Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>
Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>
Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>
…order with CUDA

Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>
@flezaalv
flezaalv force-pushed the flezaalv/refactor_jagged_index_select_2D branch from 8467cd1 to a31766f Compare August 28, 2026 18:25
@flezaalv
flezaalv requested a review from dvrogozh August 28, 2026 18:48

@dvrogozh dvrogozh left a comment

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LGTM

@aagalleg aagalleg left a comment

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LGTM

@dvrogozh
dvrogozh merged commit 6c8b6e4 into intel:main Aug 28, 2026
17 checks passed
@aagalleg
aagalleg deleted the flezaalv/refactor_jagged_index_select_2D branch October 1, 2026 21:27
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3 participants