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Qualify known integer behavior and defer unresolved CPU protocols - #22

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ilehtoranta merged 209 commits into
codex/synthetic-logical-control-suitefrom
codex/synthetic-reference-qualification
Oct 9, 2026
Merged

ilehtoranta merged 209 commits into
codex/synthetic-logical-control-suitefrom
codex/synthetic-reference-qualification

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@ilehtoranta ilehtoranta commented Oct 4, 2026 •

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The known synthetic integer suite is accepted under the user's 2026-10-09 approval. Unclear CPU behavior is explicitly deferred and opt-in instead of blocking this scope or being counted as passing. A versioned qualification registry records five deferred areas, reasons and opt-in routes; ordinary/reference summaries embed it and its hash. The required milestone 1-5 matrices and all mismatch, missing/empty-input and case-count checks are unchanged. Explicitly requested unresolved audits still fail honestly. Historical failures and the 480-case untested inventory remain retained.

CPU context copying previously lost suspended delivery state on fresh destinations or reused an unrelated destination event. The approved two-file production fix copies pending entries with independently owned nested identities in both CopyFrom and CopyTaskContextFrom, replaces stale destination entries, clears empty incoming contexts and preserves self-copy. It adds no public API or timing-policy change. The ownership regression now runs in ordinary Synthetic CI. Fresh production-source execution passes 23 selected tests / 4,158 cases, and all eight reports match the qualified candidate byte-for-byte. All 37 CPU source inputs match the candidate already qualified by the full suite, references, API and consumers. Other private continuation candidates remain unimported; no package publication is included.

The retained 040 supplied-frame fixtures cover mixed byte/word/long writeback slots, CCR images, stack banks, FC1/5 patterns, rejected bytes and explicit nested handler/RTE unwinds. They check saved SR/PC, registers, stacks, DFC restoration, completed stores and following sentinels without automatic instruction retries after partial effects. Maintained isolated commands provide source/binary/method/report linkage, mutation detection, relocation checks, corruption rejection and strict evidence replay. First-read recovery additionally checks explicit repair/RTE and completed instruction/sentinel phases. These bounded software fixtures do not qualify hardware timing, enabled MMU operation or the broader restoration inventory.

Validation retains exact frozen source graphs rather than relabeling earlier executions:

  • The all-CCR private candidate full run qualifies 5,454 named rows: 5,365 passing, 89 explicitly unavailable, zero failures. All 5,408 prior rows remain. Its 1,031 reports contain 87,254,872 passing logical cases; all 983 prior reports are unchanged and 48 additions match independently qualified fixtures. Ten pinned native reference presets pass. The report-only ordinary gate validates 86,663,530 cases / 783 batches.
  • Same-build deep/reference checks pass 320,000 seeded cases, 312,500 pinned 000 SingleStepTests cases and 536 self-checking Musashi programs across eight profiles; 88 exclusions remain explicit. All eight actual invalid requests fail. Compiled API review finds zero public/protected changes across 20 types / 211 records.
  • The retained local-only .81 package builds clean committed CopperScreen a4e80b6; 172 host tests pass with six unavailable, 74 disk tests and 1,080 engine tests pass. The relocated ROM matches its original pin. Both native Workbench floppy replays pass with 0 and 2 MiB Fast RAM, exact cycle/PC/mapping/framebuffer assertions and zero skips after 10,000 fields each. Independent checks bind media, loaded methods, archived sources and package/CPU identities. The original failed missing-ROM flow is preserved as historical evidence.
  • The current diagnostic/Fact-attribute edits have focused production-source checks; no new whole-test-graph full execution is claimed. The 480-case broader protocol gate still fails with all exact requirements untested, while 29,952 control cases retain byte-identical passing reports. Retired semantic regressions have exact replacement/mutation evidence; cache, prefetch, bus ordering, detailed fault, JIT and native regressions remain retained.

Full proof: 7ec3339429e005d4e5d21946c66444723e77928bfa8b9bbaa064fc4601ae72b9. Native consumer proof: 41629e60cdc0da0ef43f35893110d29422907f1c01cd951536034aaf263977bf. Approved production promotion proof: c1e006019ea3c3db0a331aa58f66e2a8b412d0f9943d7cb4ccc864bc66ebae33.

The broad WinUAE gate still disagrees on 010 invalid-format RTE CCR and 060 ordinary STOP privilege behavior. Disputed 030/040 trace boundaries have no hardware qualification. Wider original-frame construction, repair/refault, partially accepted transfers, foreign-frame and trace/interrupt protocols remain incomplete. Passing scoped presets and host snapshot checks do not close these gates. FPU arithmetic, enabled MMU, physical pipeline/cache qualification and OS compatibility remain outside the accepted roadmap.

Exact commands, identities, mutation witnesses, historical attempts, limitations and current milestone status are in the formal suite plan, docs/COPPER68K_REFERENCE_QUALIFICATION.md, docs/COPPER68K_MILESTONE6_COMPLETION_AUDIT.md and Copper68k.Tests/Synthetic/README.md.

Acceptance-policy verification passes the unchanged 86,663,530-case / 783-batch report gate. Its summary differs only by scope metadata. Four actual negative requests reject missing required coverage, a dropped deferral, a deferral labeled passing and a duplicate deferred ID. Proof: 8740d0938cb8b1ad5ba04de44f8e472bb144f57623a1287da05156c2ca4e7a45. The unresolved areas described above are now deferred and nonblocking for the approved known suite; roadmapComplete=false remains deliberate. No other private CPU candidate is imported and no package is published.

@ilehtoranta ilehtoranta changed the title Audit integer programs across CPU models and fix 68040 T0 tracing Qualify CPU instructions across models and fix 68040 trace/MMU decoding Oct 4, 2026
@ilehtoranta ilehtoranta changed the title Qualify CPU instructions across models and fix 68040 trace/MMU decoding Qualify CPU instructions across models and fix 68000/68040 exceptions Oct 4, 2026
@ilehtoranta ilehtoranta changed the title Qualify CPU instructions across models and fix 68000/68040 exceptions Qualify CPU instructions and fix 68000/68010/68040 exceptions Oct 4, 2026
@ilehtoranta ilehtoranta changed the title Qualify CPU instructions and fix 68000/68010/68040 exceptions Qualify integer instructions and CPU exception handling Oct 4, 2026
@ilehtoranta ilehtoranta changed the title Qualify integer instructions and CPU exception handling Qualify known integer behavior and defer unresolved CPU protocols Oct 9, 2026
@ilehtoranta
ilehtoranta marked this pull request as ready for review October 9, 2026 14:00
@ilehtoranta
ilehtoranta merged commit 2822e80 into codex/synthetic-logical-control-suite Oct 9, 2026
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@ilehtoranta
ilehtoranta deleted the codex/synthetic-reference-qualification branch October 9, 2026 20:04
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