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t27b: a bench's _ = e; is a discard; ternary_gates' benches type-check once referenced (Closes #8546) - #8616
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…e-check once referenced (Closes #8546) c757043 (see #8195) changed the bench bodies of two specs. After that, t27b refused both with `type mismatch`. - arty_a7_integration.t27: bench_integration_config discards a u32, a u32, then a bool at its top level. discard_plan.t27 sent every top-level `_ = e;` in a bench to t27b's test-binding path. That path bound `_` as a variable of the first value's type, so it refused the bool. t27c's gen_bench_block prints each one as Zig's `_ = e;`, and Zig compiles the bench once a test calls it (checked on the lab). The plan's `plan` now takes `in_bench`, and a bench's discards are EVALUATE. Two new tests cover this; the glue changes one line. - ternary_gates.t27: t27b was right to refuse it. Once a test calls its benches, zig 0.16 refuses them three ways: `(result + 1) % 3` is a signed `%`, an i32 into a u32, and `vals[idx]` indexes a tuple at run time. The reference passed only because nothing calls a bench (see #7908 for the same case in a fn). The benches now use a `[3]i32` and `@intCast(result + 1)`. With a test that calls all four benches, the generated Zig passes 13/13. Ledger: both rows are back to pass, and max_not_pass goes from 27 to 25. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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October 10, 2026 13:43
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This was referenced Oct 11, 2026
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Closes #8546
Part of the t27b coverage epic (see #8326 and #6063). c757043 (see #8195) changed the bench bodies of two specs. After that, t27b refused both with
type mismatch.Cause and fix
arty_a7_integration.t27: a t27b bug.
bench_integration_configdiscards a u32, a u32, then a bool at its top level.specs/tri/t27b/discard_plan.t27sent every top-level_ = e;in a bench to t27b's test-binding path. That path bound_as a variable of the first value's type, so it refused the bool: "expected u32, found bool".gen_bench_blockprints each discard as Zig's_ = e;. On the lab, with a test that calls the bench, the generated Zig compiles and passes 7/7.plannow takesin_bench, and a bench's discards are EVALUATE: compiled and never run, like the rest of a bench body. Two new plan tests cover this. The glue changes one line incli/t27b/src/lower.rs.ternary_gates.t27: the spec, not t27b.
remainder division with 'i32' and 'comptime_int': signed integers and floats must use @rem or @mod, from(result + 1) % 3;tuple field index must be comptime-known, becauseconst vals = [_]i32{...}is printed as a tuple andvals[idx]indexes it at run time.specs/basics/15_loops.t27, which the ledger records as reference-bug (see specs/basics/15_loops.t27: sum_to does not compile once a test calls it; the lesson passes only because nothing does #7908: it does not compile once called, and nothing calls it). So t27b is not changed here.const vals : [3]i32andconst idx : u32 = @intCast(result + 1);and index withvals[idx % 3]. The generated Zig, with a test that calls all four benches, passes 13/13. That meets specs: bench bodies Zig never type-checks (8 specs reject once referenced) #8195's stated goal: bench bodies type-check once referenced.Checks on the t27c lab
t27b test specs/isa/ternary_gates.t27 --checkt27b test specs/fpga/boards/arty_a7_integration.t27 --checkt27c test-reporton ternary_gatest27c test-reporton discard_plancargo test --release -p t27b(aarch64 under qemu)t27b corpus specsunder qemu before and after the change. Only three verdicts changed: the two specs, blocked to pass, and discard_plan, which gained 2 tests.specs/hslm/forward_pass.t27lost one of its later blocker families; its first blocker is unchanged. pass went from 1257 to 1259 and blocked from 488 to 486. fail stayed at 20 and jit/interp mismatch at 0.tri t27b ratchetagainst the new ledger, with the reference verdict set by hand for the listed rows. It reports no UNEXPECTED PASS and no OVER CAP. It does report 7 UNEXPECTED FAILURE rows, all qemu timeouts that also time out on master's binary.own_language.cgivescheck_budgetexit 0 andcheck_allexit 0. Net hand lines: 0 (lower.rs+1 -1).t27c seal --savewas run for ternary_gates and discard_plan.gen/rust/tri/t27b/discard_plan.rswas regenerated witht27c gen-rust.Ledger: both rows are back to
{"path": ..., "t27b": "pass"}, and max_not_pass goes from 27 to 25.Generated with Claude Code