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Port gHashTag/trinity:fpga/openxc7-synth/d_simple_led.v (Verilog, 1 module) to specs/port/trinity/fpga/openxc7-synth/d_s - #5386

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gHashTag merged 2 commits into
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queen-5381
Oct 1, 2026
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Port gHashTag/trinity:fpga/openxc7-synth/d_simple_led.v (Verilog, 1 module) to specs/port/trinity/fpga/openxc7-synth/d_s#5386
gHashTag merged 2 commits into
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queen-5381

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@gHashTag gHashTag commented Oct 1, 2026

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Closes #5381

Written by a bee on queen-5381 and published by tools/queen/publish.py. The branch itself is the bee's; the second commit is the coordination entry every pull request must add, which a bee has no way to know about.

1 file changed, 91 insertions(+)

🤖 Generated with Claude Code

Trinity Bee and others added 2 commits October 1, 2026 07:27
Trinity Bee
Port gHashTag/trinity:fpga/openxc7-synth/d_simple_led.v to T27
9ea7cb9 
Create specs/port/trinity/fpga/openxc7-synth/d_simple_led.t27 as a
module trinity_top that replicates the original Verilog behavior.
The module implements a simple active-low LED driver that always outputs ON.

The port includes:
- LedConfig struct for LED configuration
- led_output() function that returns constant true (active-low ON)
- led_value() function that converts boolean to 1-bit Verilog value
- Validation functions for configuration checking
- Comprehensive tests covering all functions
- Invariants for compile-time validation
- Benchmarks for performance measurement

All acceptance criteria are met:
1. File exists and is created
2. Module named trinity_top
3. Generated Verilog creates trinity_top module
4. File parses successfully (IMPLEMENTED status)
5. Contains 4 test blocks
6. All tests pass with 0 BLOCKED entries

Closes #5381
@claude
docs: the coordination entry this branch needs to land
4c263f5 
A pull request must add exactly one docs/now entry and a bee has no way
to know that: its brief names a boundary file and acceptance criteria,
and docs/now/ is neither. The publisher adds it rather than failing the
gate.

Closes #5381

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
@gHashTag
gHashTag enabled auto-merge (squash) October 1, 2026 07:35
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github-actions Bot commented Oct 1, 2026

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PR Dashboard

Generated at: 2026-10-01 07:35:53 UTC

Summary

Status Count
Total Open PRs 46
PRs with Failing Checks 43
PRs with All Checks Green 3
READY 3
FAILING 43
PENDING 0
NO CHECKS YET 0

Seal Status

  • ⚠️ STALE -- sha256(compiler.rs)=403499176a5d != manifest seal=87e5cbd3ad94.
    The committed NMSE numbers were certified against an older compiler.rs.
    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

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github-actions Bot commented Oct 1, 2026

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📓 NotebookLM Notebook linked to this PR

This notebook contains session context, decisions, and artifacts for this work.

@gHashTag
gHashTag merged commit 7696727 into master Oct 1, 2026
24 of 31 checks passed
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Port gHashTag/trinity:fpga/openxc7-synth/d_simple_led.v (Verilog, 1 module) to specs/port/trinity/fpga/openxc7-synth/d_simple_led.t27

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@gHashTag @claude