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chore: Add unit tests for arm64 disassembler #3245
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d38af0c
chore: cleanup arm64 disassembler related code
filzrev 9b385c9
chore: modify clrmd related code to use interface
filzrev a10f3cc
chore: modify arm64 instruction formatter padding logics
filzrev 586f111
chore: add arm64 disassembler unit tests
filzrev ca360a7
chore: update address to 4gb as minimum base address
filzrev a1233fc
chore: update AsmArm64 version and update related tests
filzrev 961c406
chore: modify code based on review comment
filzrev aaa2671
chore: fix wrong movz test assertion (currently it's skipped)
filzrev 025c00a
chore: fix code that pointed out by code review
filzrev 28946dd
chore: add DebuggerHidden attribute on helper methods
filzrev 3e393b3
chore: add code to throw dedicated exception when unexpectedly MockCl…
filzrev 95bb6b4
chore: add using for MockClrInstance instance
filzrev 11dfa26
chore: fix wrong comment on instructions
filzrev 132e096
chore: add MockMemory class and refator codes
filzrev 3094f3c
chore: add remaining issue comment link
filzrev 2304b83
chore: cleanup MockDataReader
filzrev 0ad2fd1
chore: fix typo
filzrev 7124b6c
chore: add unit tests for code coverage
filzrev 89efdaa
chore: fix UnreachableException visibility to internal and #if directive
filzrev 924add6
chore: modify CreateValueAccumulator logics with initial state
filzrev edcdf9e
chore: remove not used extension methods
filzrev 5249d5c
chore: update wrong doc comment
filzrev eee29f8
chore: add reset api to set initial accumulator state
filzrev 2d6b4e8
chore: remove unused baseAddress parameter
filzrev 5aa4678
chore: cleanup #if directives
filzrev edc10f5
chore: add ThrowExceptionMode property and not throw by default
filzrev 8ddcd31
chore: suppress padding when instruction has no operands
filzrev abcc4ea
chore: modify test instructions to pass all trampoline code pass
filzrev a3ca150
chore: add todo comment that be handled on next pr
filzrev 2d97e70
chore: fix wrong comment
filzrev 5ea2d39
chore: enable throwExceptionMode per test and return 0 when address i…
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144 changes: 144 additions & 0 deletions
144
src/BenchmarkDotNet/Disassemblers/Arm64RegisterValueAccumulator.cs
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,144 @@ | ||
| using Gee.External.Capstone.Arm64; | ||
| using Microsoft.Diagnostics.Runtime.Interfaces; | ||
|
|
||
| namespace BenchmarkDotNet.Disassemblers; | ||
|
|
||
| internal struct Arm64RegisterValueAccumulator | ||
| { | ||
| internal enum State | ||
| { | ||
| LookingForPattern, | ||
| ExpectingMovk, | ||
| ExpectingAdd, | ||
| LookingForPossibleLdr | ||
| } | ||
|
|
||
| private State _state; | ||
| private long _value; | ||
| private int _expectedMovkShift; | ||
| private Arm64RegisterId _registerId; | ||
| private IClrRuntime _runtime; | ||
|
|
||
| public void Init(IClrRuntime runtime) | ||
| { | ||
| _runtime = runtime; | ||
| Reset(); | ||
| } | ||
|
|
||
| internal void Reset( | ||
| State state = State.LookingForPattern, | ||
| int expectedMovkShift = 0, | ||
| long value = 0, | ||
| Arm64RegisterId registerId = Arm64RegisterId.Invalid) | ||
| { | ||
| _state = state; | ||
| _expectedMovkShift = expectedMovkShift; | ||
| _value = value; | ||
| _registerId = registerId; | ||
| } | ||
|
|
||
| public void Feed(Arm64Instruction instruction) | ||
| { | ||
| Arm64InstructionDetail details = instruction.Details; | ||
|
|
||
| switch (_state) | ||
| { | ||
| case State.LookingForPattern: | ||
| if (instruction.Id == Arm64InstructionId.ARM64_INS_MOVZ) | ||
| { | ||
| _registerId = details.Operands[0].Register.Id; | ||
| _value = details.Operands[1].Immediate; | ||
| _state = State.ExpectingMovk; | ||
| _expectedMovkShift = 16; | ||
| } | ||
| else if (instruction.Id == Arm64InstructionId.ARM64_INS_ADRP) | ||
| { | ||
| _registerId = details.Operands[0].Register.Id; | ||
| _value = details.Operands[1].Immediate; | ||
| _state = State.ExpectingAdd; | ||
| } | ||
| break; | ||
| case State.ExpectingMovk: | ||
| if (instruction.Id == Arm64InstructionId.ARM64_INS_MOVK && | ||
| details.Operands[0].Register.Id == _registerId && | ||
| details.Operands[1].ShiftOperation == Arm64ShiftOperation.ARM64_SFT_LSL && | ||
| details.Operands[1].ShiftValue == _expectedMovkShift) | ||
| { | ||
| _value = _value | (instruction.Details.Operands[1].Immediate << details.Operands[1].ShiftValue); | ||
| _expectedMovkShift += 16; | ||
| break; | ||
| } | ||
| _state = State.LookingForPossibleLdr; | ||
| goto case State.LookingForPossibleLdr; | ||
| case State.ExpectingAdd: | ||
| if (instruction.Id == Arm64InstructionId.ARM64_INS_ADD && | ||
| details.Operands[0].Register.Id == _registerId && | ||
| details.Operands[1].Register.Id == _registerId && | ||
| details.Operands[2].Type == Arm64OperandType.Immediate) | ||
| { | ||
| _value = _value | instruction.Details.Operands[2].Immediate; | ||
| _state = State.LookingForPossibleLdr; | ||
| } | ||
| break; | ||
| case State.LookingForPossibleLdr: | ||
| if (instruction.Id == Arm64InstructionId.ARM64_INS_LDR && | ||
| details.Operands[1].Type == Arm64OperandType.Memory && | ||
| details.Operands[1].Memory.Base.Id == _registerId && // The source address is in the register we are tracking | ||
| details.Operands[1].Memory.Displacement == 0 && // There is no displacement | ||
| details.Operands[1].Memory.Index == null) // And there is no extra index register | ||
| { | ||
| // Simulate the LDR instruction. | ||
| long newValue = (long)_runtime.DataTarget.DataReader.ReadPointer((ulong)_value); | ||
| _value = newValue; | ||
| if (_value == 0) | ||
| { | ||
| _state = State.LookingForPattern; | ||
| } | ||
| else | ||
| { | ||
| // The LDR might have loaded the result in another register | ||
| _registerId = details.Operands[0].Register.Id; | ||
| } | ||
| } | ||
| else if (instruction.Id == Arm64InstructionId.ARM64_INS_CBZ || | ||
| instruction.Id == Arm64InstructionId.ARM64_INS_CBNZ || | ||
| instruction.Id == Arm64InstructionId.ARM64_INS_B && details.ConditionCode != Arm64ConditionCode.Invalid) | ||
| { | ||
| // ignore conditional branches | ||
| } | ||
| else if (details.BelongsToGroup(Arm64InstructionGroupId.ARM64_GRP_BRANCH_RELATIVE) || | ||
| details.BelongsToGroup(Arm64InstructionGroupId.ARM64_GRP_CALL) || | ||
| details.BelongsToGroup(Arm64InstructionGroupId.ARM64_GRP_JUMP)) | ||
| { | ||
| // We've encountered an unconditional jump or call, the accumulated registers value is not valid anymore | ||
| _state = State.LookingForPattern; | ||
| } | ||
| else if (instruction.Id == Arm64InstructionId.ARM64_INS_MOVZ) | ||
| { | ||
| // Another constant loading is starting | ||
| _state = State.LookingForPattern; | ||
| goto case State.LookingForPattern; | ||
| } | ||
| else | ||
| { | ||
| // Finally check if the current instruction modified the register that was accumulating the constant | ||
| // and reset the state machine in case it did. | ||
| foreach (Arm64Register reg in details.AllWrittenRegisters) | ||
| { | ||
| // Some unexpected instruction overwriting the accumulated register | ||
| if (reg.Id == _registerId) | ||
| { | ||
| _state = State.LookingForPattern; | ||
| } | ||
| } | ||
| } | ||
| break; | ||
| } | ||
| } | ||
|
|
||
| public bool HasValue => _state == State.ExpectingMovk || _state == State.LookingForPossibleLdr; | ||
|
|
||
| public long Value => _value; | ||
|
|
||
| public Arm64RegisterId RegisterId => _registerId; | ||
| } |
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