raspberrypi: derive QMI PSRAM timings from clk_sys

[ladyada-eagleclaw]

What

Derive the RP2350 QMI PSRAM timing fields from the actual clk_sys frequency at boot and whenever microcontroller.cpu.frequency changes.

Why

The existing QMI values encode absolute-time PSRAM requirements in clock cycles calculated for a 7.52 ns cycle. At the RP2350 port's 150 MHz clock, the fixed MIN_DESELECT value becomes 46.7 ns, below the PSRAM's 50 ns minimum; higher clocks shorten it further.

This belongs in the Raspberry Pi port because it programs the RP2350-specific QMI timing register. MAX_SELECT targets 7.5 us to leave margin below the 8 us ceiling, while MIN_DESELECT rounds up so it stays at or above 50 ns. The calculation keeps kHz precision so valid fractional-MHz clocks remain safe.

Forum report

Calculated timings

These values are calculated from the register settings; they are not hardware measurements.

clk_sys	MAX_SELECT	CS assertion	MIN_DESELECT	CS deassertion
133 MHz	15	7.22 us	7	52.6 ns
140.5 MHz	16	7.29 us	8	56.9 ns
150 MHz	17	7.25 us	8	53.3 ns
200 MHz	23	7.36 us	10	50.0 ns
252 MHz	29	7.37 us	13	51.6 ns
264 MHz	30	7.27 us	14	53.0 ns

For comparison, the old fixed values give 46.7 ns at 150 MHz and 27.8 ns at 252 MHz.

Hardware tested

Not run on hardware; no Fruit Jam or other CIRCUITPY_PSRAM device was connected. In particular, the gc.mem_free() regression check and runtime frequency-change test still need hardware confirmation.

How I tested it

• Built adafruit_fruit_jam successfully: 919,152 bytes flash, 74,312 bytes RAM.
• Passed CircuitPython formatting, spelling, and diff checks on the changed files.
• Passed the linked-image core1 flash-reachability check.
• Inspected firmware.elf: boot reads clk_sys before QMI direct-mode access; the timing updater is RAM-resident and has no function calls; the runtime path masks interrupts, changes the clock, updates QMI timing, and restores interrupts in that order.

Scope

This PR only corrects QMI PSRAM timing across boot and runtime system-clock changes. The separate DVI vertical-back-porch issue mentioned in the forum discussion is deliberately excluded.

AI assistance

I used Codex from a detailed task prompt that identified the suspected fixed-clock timing bug, source area, timing formulas, expected clock table, build target, and forum report. The agent reviewed the implementation and pinned Pico SDK register definitions, built the Fruit Jam target, inspected the linked image for RAM safety and call ordering, and incorporated automated review feedback. No hardware test results were generated or inferred.

[Copilot]

Pull request overview

Derives RP2350 PSRAM QMI timings from clk_sys rather than fixed 133 MHz assumptions.

Changes:

• Reads the system clock before QMI direct mode.
• Calculates maximum select and minimum deselect timings dynamically.

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[tannewt]

Thanks for the fix! Please drop the common_hal_ prefix because this isn't an API that applies across ports. Most common_hal API should be setup in a bindings header.

[tannewt]

Thank you!