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Populate PLIO mm2s/s2mm names for interface tile trace - #125

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jvillarre merged 3 commits into
Xilinx:masterfrom
predutta:fix_trace
Oct 7, 2026
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jvillarre merged 3 commits into
Xilinx:masterfrom
predutta:fix_trace

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Populate mm2s_names/s2mm_names for PLIO interface tiles (indexed by stream ID), so SelTraceConfig in aie_event_runtime_config carries the real port names instead of "unused" and hwanalyze stops falling back to default port names for mm2s_ports/s2mm_ports trace.

Tested on aie1 (vck190) with (tile_based_interface_tile_metrics=all:mm2s_ports) in xrt.ini . Diffing aie_event_runtime_config_0.json before and after the fix, the only changes are the four traced interface tiles (22,0), (23,0), (26,0) and (28,0): mm2s_names[0] went from "unused" to G.in[2], G.in[1], G.in[0] and G.in[3]. Each name matches the input PLIO for that column in the design's aie_control_config.json. All other entries, including the AIE-tile all_stalls blocks, were unchanged.

Signed-off-by: predutta <predutta@amd.com>
@predutta
predutta requested review from jvillarre and a balanced review from Copilot September 30, 2026 21:46

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Copilot review overview

🟡 Changes recommended

Trace consumers still read PLIO names by logical channel slot, so nonzero stream IDs can remain "unused".

Review effort: Balanced
Findings: 1 Medium severity

Open (1)
What changed in this PR

Populates PLIO names for interface-tile trace reporting.

Changes:

  • Indexes PLIO names by stream ID and GMIO names by DMA channel.
File Description
profile/​database/​static_info/​filetypes/​aie_control_config_filetype.cpp Extends MM2S/S2MM name population to PLIOs.

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// Populate mm2s_names/s2mm_names for SelTraceConfig (hwanalyze uses these,
// not PortTraceConfig.names). GMIO is indexed by DMA channel; PLIO by streamId.
{
uint8_t nameIdx = (type == io_type::GMIO) ? channelNum : streamId;
predutta and others added 2 commits October 5, 2026 12:38
Address review on Xilinx#125: PLIO names were stored in mm2s_names/s2mm_names by
stream ID but read back by channel slot, so only stream 0 worked. Restore
GMIO-only population in getInterfaceTiles, look up PLIO names from
port_names[streamPortId] in configStreamSwitchPorts, and stop edge
aie_trace.cpp from overwriting PLIO names.

Co-authored-by: Cursor <cursoragent@cursor.com>
Address Copilot review: the VE2 zocl interface-tile path overwrote PLIO
mm2s/s2mm names set by configStreamSwitchPorts with "unused". Only set
these names for GMIO, matching the edge plugin.

Co-authored-by: Cursor <cursoragent@cursor.com>
@jvillarre
jvillarre merged commit 5bacd4a into Xilinx:master Oct 7, 2026
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3 participants