Add RISC-V CXL U-Boot LegoFS evaluation

[vickiegpt]

Summary

• boot SiFive U through OpenSBI and CXL-aware U-Boot before Linux
• enumerate and initialize the QEMU CXL Type-3 device, then map its 256 MiB DAX HPA into LegoFS/CXLMemSim
• add counter-verified Blob, trusted-direct, and bounded single-rank IO500 guest modes
• record immutable manifests, console/server evidence, and structured results

Validation

• full build: PASS (scripts/build.sh --legofs)
• unit/contract tests: 40/40 PASS
• final cold-boot matrix: 20/20 PASS (4 modes x 5 paired repetitions)
• every case proves U-Boot decoder initialization, Linux CXL topology, nonzero CXLMemSim reads/writes, and selected-path server counters

Scope

These are RISC-V QEMU/TCG + synchronous CXLMemSim comparative results, not physical-CXL performance. The bounded one-second IO500 configuration is intentionally INVALID for ranking. The host ECC-faulting physical CXL DIMM is not in this measurement path; each case uses fresh POSIX shared memory.