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cpu: compile out other architectures' fallbacks #114

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Merged
amaanq merged 3 commits into from
Oct 30, 2026
Merged

cpu: compile out other architectures' fallbacks #114

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e2349f3
cpu: compile out other architectures' cpuinfo fallbacks
amaanq Oct 30, 2026
6eff015
build: drop the eh_frame_hdr lookup table
amaanq Oct 30, 2026
3423e46
cargo: bump to 1.2.2
amaanq Oct 30, 2026
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8 changes: 4 additions & 4 deletions Cargo.lock
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6 changes: 3 additions & 3 deletions Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -29,11 +29,11 @@ edition = "2024"
license = "GPL-3.0"
repository = "https://github.com/notashelf/microfetch"
rust-version = "1.95.0"
version = "1.2.1"
version = "1.2.2"

[workspace.dependencies]
microfetch-asm = { path = "./crates/asm", version = "1.2.1" }
microfetch-lib = { path = "./crates/lib", version = "1.2.1" }
microfetch-asm = { path = "./crates/asm", version = "1.2.2" }
microfetch-lib = { path = "./crates/lib", version = "1.2.2" }

criterion = { default-features = false, features = [ "cargo_bench_support" ], version = "0.8.2" }

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2 changes: 2 additions & 0 deletions build.rs
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Expand Up @@ -37,6 +37,8 @@ fn main() -> io::Result<()> {
if env::var("DEBUG").as_deref() != Ok("true") {
println!("cargo:rustc-link-arg-bin=microfetch=-Wl,--strip-all");
}
// Nothing unwinds with panic=abort, so skip the unwinder's lookup table
println!("cargo:rustc-link-arg-bin=microfetch=-Wl,--no-eh-frame-hdr");
// Omit the .note.gnu.build-id section
println!("cargo:rustc-link-arg-bin=microfetch=-Wl,--build-id=none");
// Disable RELRO (removes relro_padding)
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14 changes: 11 additions & 3 deletions crates/lib/src/cpu.rs
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Expand Up @@ -132,6 +132,10 @@ fn get_core_count(threads: u32) -> u32 {
/// by reading `/sys/devices/cpu_core/cpus` and `/sys/devices/cpu_atom/cpus`.
#[cfg(target_os = "linux")]
fn get_pe_cores() -> Option<(u32, u32)> {
if !cfg!(any(target_arch = "x86", target_arch = "x86_64")) {
return None;
}

let perf = count_pmu_cores("/sys/devices/cpu_core/cpus")?;
let eff = count_pmu_cores("/sys/devices/cpu_atom/cpus").unwrap_or(0);
(perf > 0 && eff > 0).then_some((perf, eff))
Expand Down Expand Up @@ -327,7 +331,8 @@ fn get_cpu_freq_mhz(cpuinfo: &[u8]) -> Option<u32> {
// Octeon presets loops_per_jiffy to clock_rate/HZ, so its BogoMIPS is
// exactly 2x the core clock, unlike the 1:1 of other MIPS.
// https://github.com/torvalds/linux/blob/v6.19/arch/mips/cavium-octeon/csrc-octeon.c#L40
if *key == b"BogoMIPS"
if cfg!(any(target_arch = "mips", target_arch = "mips64"))
&& *key == b"BogoMIPS"
&& cpuinfo.windows(6).any(|window| window == b"Octeon")
{
mhz /= 2;
Expand All @@ -340,7 +345,9 @@ fn get_cpu_freq_mhz(cpuinfo: &[u8]) -> Option<u32> {
}
// SPARC exposes its clock as `Cpu0ClkTck : <hex>`,
// which signifies ticks per second in hex.
if let Some(val) = extract_field(cpuinfo, b"Cpu0ClkTck") {
if cfg!(any(target_arch = "sparc64", target_arch = "sparc"))
&& let Some(val) = extract_field(cpuinfo, b"Cpu0ClkTck")
{
let mut hz = 0_u64;
let mut seen = false;
for &byte in val.as_bytes() {
Expand Down Expand Up @@ -389,7 +396,8 @@ fn write_model_name(writer: &mut StackWriter) {
true
},
None => {
write_dt_compatible(writer)
(cfg!(not(any(target_arch = "x86", target_arch = "x86_64")))
&& write_dt_compatible(writer))
|| (cfg!(target_arch = "aarch64") && write_arm_part(writer, data))
},
};
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