Add Nuvoton M251/M252 platform support

[Belonit]

Summary

Add a ChibiOS-Contrib platform implementation for the Nuvoton M251/M252
Cortex-M23 family, with an initial concrete target for the NuMaker-M252SD
board and its M252SD2AE MCU.

The port provides:

• the ARMv8-M Baseline core port and M251/M252 startup support;
• M251BSP device headers, retaining their upstream copyright and license notices;
• HAL LLDs for clock/reset, SysTick, PAL, SERIAL, USB device, GPT, EFL, PWM, I2C, SPI, and WDG;
• the NUMAKER_M252SD board definition;
• ten testhal applications for the NuMaker-M252SD board;
• RT 7 and RT 8 configuration compatibility through one shared chconf.h;
• CI coverage for testhal/NUMICRO/M251 on stable_21.11.x.

The change is self-contained in ChibiOS-Contrib. It does not modify the ChibiOS core or existing NUMICRO platforms.

Supported hardware

• Board: NuMaker-M252SD.
• MCU: M252SD2AE.
• Toolchain: Arm GNU Toolchain 10-2020-q4 in CI.

Device scope

The drivers use the register model shared by the M251/M252 family. M252SD2AE is the currently described registry target and the device used for hardware validation. Additional family members can be enabled by adding registry entries describing their memory geometry, interrupt set and peripheral capabilities.
USB device support requires a device containing the USBD peripheral.

Vendor headers

The imported CMSIS device and StdDriver header sets are derived from the official Nuvoton M251BSP V3.02.009 release.
Original Apache-2.0 license, NOTICE, and copyright information are retained. No StdDriver source implementation is imported.

Current limitations

• ST supports periodic SysTick mode; free-running mode is not implemented.
• SPI supports master mode only, without circular transfers.
• SERIAL currently requires the direct 48 MHz HIRC clock.
• I2C enables a hardware no-progress timeout by default. At a 48 MHz peripheral clock it expires after about 1.37 ms; set M251_I2C_USE_HW_TIMEOUT=FALSE for slaves requiring longer clock stretching and use a finite API timeout.
• USB is available only on M252 devices containing USBD, exposes endpoint zero and five logical bidirectional endpoints through paired hardware slots, and does not support isochronous endpoints.

Validation

All targets build successfully with both supported ChibiOS generations, in checked and release configurations:

ChibiOS version	Checked	Release
stable_21.11.x / RT 7.0.6	10/10 PASS	10/10 PASS
ChibiOS master @ fd2e59c34878 / RT 8.0.0	10/10 PASS	10/10 PASS

The required ChibiOS-Contrib test build is included in CI:

tools/chbuild.sh testhal/NUMICRO/M251
I2C1_DISPLAY=SSD1306 \
  tools/chbuild.sh testhal/NUMICRO/M251/NUMAKER_M252SD/I2C

The second command compile-checks the optional dual-SSD1306 configuration; the
hardware matrix below remains the ten primary testhal targets.

All testhal targets were also validated on a NuMaker-M252SD v1.2:

Target	Hardware validation
Blinky	SysTick, scheduler, PAL output, and PB.14 LED
GPT	TIMER0 callbacks and stop/restart lifecycle
SERIAL	UART0 through Nu-Link VCOM at 115200 8N1
PAL_EVENTS	PA.3 to PA.0 loopback and both-edge callbacks
PWM	BPWM0 output, callback lifecycle, and READY-to-READY reconfiguration
SPI	SPI0 MOSI-to-MISO loopback in all four modes at 100 kHz, 1 MHz, and 2 MHz
I2C	Concurrent I2C0 SSD1306 128x64 and I2C1 LCD1602/PCF8574 operation and independent bus recovery
USB_HID	Enumeration, bidirectional HID traffic, reconnect, and host suspend/resume
EFL	MFS persistence, garbage collection, and power-loss recovery
WATCHDOG	System reset, watchdog stop/start, and watchdog reset

Review notes

• The M251/M252 drivers intentionally remain in os/hal/ports/NUMICRO/M251.
  Existing NUMICRO/LLD/*v1 drivers are NUC123-specific and use incompatible peripheral register models.
• The testhal examples use the board's documented pins and include only the wiring and safety information needed to run each test independently.
• All files retain their applicable upstream or project license headers and original copyright notices. The ARMv8-M Baseline core port retains the ChibiOS GPLv3 license; HAL, startup, test code and imported Nuvoton headers retain Apache-2.0 headers where applicable.