[AdaWorldAPI]

What

masked_sum_i32 now chooses its method one 64-bit mask word at a time:

• Empty word: skipped, as before.
• Sparse word (at most 16 set bits): keeps the existing set-bit walk.
• Dense full word (more than 16 set bits): sums all 64 lanes without branching. Each value is widened to i64 and masked before the add, so the i64 contract still holds and the loop can vectorize.
• Partial final word: always takes the walk, so it never reads past the end of values.

The threshold of 16 and the expected speed-up come from the D-MPF-2b measurement in lance-graph #1752: 2–5× faster than the walk, and never slower.

Measured in the consumer (lance-graph #1763, P2 probe, 4096-slot fold, median)

mask density	before	after
full, AVX-512	2 341 ns	650 ns
full, AVX2	2 306 ns	559 ns
25 %	475 ns	468 ns

The 25 % masks barely move: at about 16 set bits per word, most words stay on the walk path.

Verification

• New test masked_sum_i32_both_word_routes_match_reference covers words just below, at and above the threshold, plus random densities. It asserts that at least 5 words take each path, so neither path can go untested.
• Disable runs, each with an asserted patch anchor; all three are red:
  • dropping the mask on the dense path breaks 2 tests;
  • accumulating the dense path in i32 breaks 3 tests, including the widening test;
  • removing the full-word guard breaks the reference test at non-multiple-of-64 lengths.
• cargo test --lib: 2627 pass.
• cargo clippy --lib --tests -D warnings: clean.
• scripts/masking-parity.sh native: PASS on AVX-512 and on config-v3 (AVX2), 19 groups.

The function is a free function in simd_masking_ops.rs and the same body serves every backend; no simd_{arch} file changed.

---

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Review	Status	Commit	Review trigger
📝 Code Review	✅ Completed 2026-10-24T23:33:29.419268Z	396596f	Draft marked ready

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