From ffa8cd4a4bdbc586da844b52893785d9e1fedac9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Artur=20N=C3=B3brega?= Date: Tue, 28 Jul 2026 17:11:26 +0100 Subject: [PATCH 1/3] feat(eth): Add ETH_DEMO; Disable SPI; Update py2hwsw. Add new ETH_DEMO flag to launch Linux validation tests for the iob_eth core using the Linux ethoc driver. After building for FPGA, launch the demo with: make fpga-run BOARD=iob_cyclonev_gt_dk RUN_LINUX=1 ETH_DEMO=1 Also, disable SPI core since its not currently used and update Py2hwsw to latest version. --- default.nix | 4 +- hardware/fpga/child2_fpga_build.mk | 12 + hardware/fpga/minicom_cache_demo.txt | 11 + hardware/fpga/minicom_cache_demo.txt.license | 3 - hardware/fpga/minicom_eth_demo.txt | 74 ++++ hardware/fpga/minicom_uart_demo.txt | 7 + software/src/soc_linux_firmware.c | 381 ++++++++++--------- software/sw_build.mk | 6 +- 8 files changed, 303 insertions(+), 195 deletions(-) delete mode 100644 hardware/fpga/minicom_cache_demo.txt.license create mode 100644 hardware/fpga/minicom_eth_demo.txt diff --git a/default.nix b/default.nix index 999b1dd..6fd1093 100644 --- a/default.nix +++ b/default.nix @@ -5,8 +5,8 @@ { pkgs ? import (fetchTarball "https://github.com/NixOS/nixpkgs/archive/25.05.tar.gz") {} }: let - py2hwsw_commit = "21b1f2db283dc72d3ad62995f3457c16f77592b0"; # Replace with the desired commit. - py2hwsw_sha256 = "XmNwIx3p5uhjueZ5vlNZvZbrR1ja2UiQ+B22ekFDxdI="; # Replace with the actual SHA256 hash. + py2hwsw_commit = "4459f67afe8df4aa8d7701bdc4d99f9e5e09fa0d"; # Replace with the desired commit. + py2hwsw_sha256 = "AEDn8d5XTOKCqsGY1K1Z+tJzcILOLX1VeHgAPUk+G6k="; # Replace with the actual SHA256 hash. # Get local py2hwsw root from `PY2HWSW_ROOT` env variable py2hwswRoot = builtins.getEnv "PY2HWSW_ROOT"; diff --git a/hardware/fpga/child2_fpga_build.mk b/hardware/fpga/child2_fpga_build.mk index 12e5c9b..d4917fa 100644 --- a/hardware/fpga/child2_fpga_build.mk +++ b/hardware/fpga/child2_fpga_build.mk @@ -20,6 +20,18 @@ ifeq ($(UART_DEMO),1) MINICOM_SCRIPT=minicom_uart_demo.txt endif +# Pass ETH_DEMO flag to remote systems +UFLAGS+=ETH_DEMO=$(ETH_DEMO) + +ifeq ($(ETH_DEMO),1) +GRAB_TIMEOUT= 1300 +MINICOM_SCRIPT=minicom_eth_demo.txt +CONSOLE_CMD += && ( cd ../../software/tests/iob_eth && ./validate_eth.sh -S root -p root -s 192.168.74.2 -i $(ETH_IF) ) +# # Override CONSOLE_CMD: skip minicom (appended by child_fpga_build.mk) and run eth test instead +# # Use = (deferred expansion) to preserve variable references for later expansion +# CONSOLE_CMD = $(IOB_CONSOLE_PYTHON_ENV) $(PYTHON_DIR)/console_ethernet.py -s $(BOARD_SERIAL_PORT) -c $(PYTHON_DIR)/console.py -m "$(RMAC_ADDR)" -i "$(ETH_IF)" && ( cd ../../software/tests/iob_eth && ./validate_eth.sh -S root -p root -s 192.168.74.2 -i $(ETH_IF) ) +endif + # include fpga build segment of (level 3) child systems # child systems can add their own child3_fpga_build.mk without having to override this one. ifneq ($(wildcard child3_fpga_build.mk),) diff --git a/hardware/fpga/minicom_cache_demo.txt b/hardware/fpga/minicom_cache_demo.txt index 046634a..850d148 100644 --- a/hardware/fpga/minicom_cache_demo.txt +++ b/hardware/fpga/minicom_cache_demo.txt @@ -1,3 +1,7 @@ +# SPDX-FileCopyrightText: 2026 IObundle +# +# SPDX-License-Identifier: MIT + # Script for "runscript" program of minicom, to test iob_cache (with DMA loopback) in linux # Set 15min timeout @@ -19,6 +23,13 @@ print "\n[minicom] Detected login prompt. Logging in..." send "root" +expect { + "Password:" + timeout 20 goto on_timeout +} + +send "root" + expect { "#" timeout 20 goto on_timeout diff --git a/hardware/fpga/minicom_cache_demo.txt.license b/hardware/fpga/minicom_cache_demo.txt.license deleted file mode 100644 index a035d81..0000000 --- a/hardware/fpga/minicom_cache_demo.txt.license +++ /dev/null @@ -1,3 +0,0 @@ -SPDX-FileCopyrightText: 2026 IObundle - -SPDX-License-Identifier: MIT diff --git a/hardware/fpga/minicom_eth_demo.txt b/hardware/fpga/minicom_eth_demo.txt new file mode 100644 index 0000000..03ae3e0 --- /dev/null +++ b/hardware/fpga/minicom_eth_demo.txt @@ -0,0 +1,74 @@ +# SPDX-FileCopyrightText: 2026 IObundle +# +# SPDX-License-Identifier: MIT + +# Script for "runscript" program of minicom, to test two iob_uart16550 instances in linux + +# Set 15min timeout +# runscript has 2min timeout by default: +# check `timeout` in: https://linux.die.net/man/1/runscript +timeout 1200 + +# Wait for the "buildroot login:" message +# Or jump straight to shell if we are already logged in +print "\n[minicom] Waiting for buildroot login..." +send "" +expect { + "buildroot login:" + "\n#" goto post_login + timeout 300 goto on_timeout +} + +print "\n[minicom] Detected login prompt. Logging in..." + +send "root" + +expect { + "Password:" + timeout 20 goto on_timeout +} + +send "root" + +expect { + "#" + timeout 20 goto on_timeout +} + +post_login: + +# +# Run tests +# + +print "\n[minicom] Logged in. Running tests..." + +send "ethtool -s "eth0" speed 100 duplex full autoneg off" + +expect { + "#" + timeout 20 goto on_timeout +} + +print "\n[minicom] Launch ssh to load required dependency modules (randomness)" +send "ssh -V" +expect { + "#" + timeout 900 goto on_timeout +} + +print "\n[minicom] Exit minicom to run standalone eth test" + +# Exit minicom +! kill `cut -f4 -d' ' /proc/$PPID/stat` + + +# Jump here when timeout is triggered +on_timeout: + +print "\n[minicom] Timeout reached. Exiting..." + +# Exit minicom +! kill `cut -f4 -d' ' /proc/$PPID/stat` + + diff --git a/hardware/fpga/minicom_uart_demo.txt b/hardware/fpga/minicom_uart_demo.txt index a5e6bb1..4e9c3e9 100644 --- a/hardware/fpga/minicom_uart_demo.txt +++ b/hardware/fpga/minicom_uart_demo.txt @@ -23,6 +23,13 @@ print "\n[minicom] Detected login prompt. Logging in..." send "root" +expect { + "Password:" + timeout 20 goto on_timeout +} + +send "root" + expect { "#" timeout 20 goto on_timeout diff --git a/software/src/soc_linux_firmware.c b/software/src/soc_linux_firmware.c index 87d989d..a0113bd 100644 --- a/software/src/soc_linux_firmware.c +++ b/software/src/soc_linux_firmware.c @@ -7,9 +7,9 @@ #include "clint.h" #include "iob_bsp.h" #include "iob_printf.h" -#include "iob_spi.h" -#include "iob_spidefs.h" -#include "iob_spiplatform.h" +//#include "iob_spi.h" +//#include "iob_spidefs.h" +//#include "iob_spiplatform.h" #include "soc_linux_conf.h" #include "soc_linux_mmap.h" #include "iob_uart16550.h" @@ -165,190 +165,197 @@ int main() { // Global interrupt disable csr_clr_bits_mstatus(MSTATUS_MIE_BIT_MASK); -#ifdef SIMULATION -#ifndef VERILATOR - unsigned int word = 0xA3A2A1A0; - unsigned int address = 0x000100; - unsigned int read_mem = 0xF0F0F0F0; - printf("\nTest: %x, %x.\n", word, read_mem); - // init spi flash controller - spiflash_init(SPI0_BASE); - printf("\nTesting SPI flash controller\n"); - // Reading Status Reg - unsigned int reg = 0x00; - spiflash_readStatusReg(®); - printf("\nStatus reg (%x)\n", reg); - - // Testing Fast Read in single, dual, quad - unsigned bytes = 4, readid = 0; - unsigned frame = 0x00000000; - unsigned commFastRead = 0x0b; - unsigned fastReadmem0 = 0, fastReadmem1 = 0, fastReadmem2 = 0; - unsigned dummycycles = 8; - - // Read ID - bytes = 4; - readid = 0; - spiflash_executecommand(COMMANS, 0, 0, ((bytes * 8) << 8) | READ_ID, &readid); - - printf("\nREAD_ID: (%x)\n", readid); - // Read from flash memory - printf("\nReading from flash (address: (%x))\n", address); - read_mem = spiflash_readmem(address); - - if (word == read_mem) { - printf("\nMemory Read (%x) got same word as Programmed(%x)\nSuccess\n", - read_mem, word); - } else { - printf("\nDifferent word from memory\nRead: (%x), Programmed: (%x)\n", - read_mem, word); - test_result = 1; - } - - address = 0x0; - read_mem = 1; - printf("\nTesting dual output fast read\n"); - read_mem = spiflash_readfastDualOutput(address, 0); - printf("\nRead from memory address (%x) the word: (%x)\n", address, read_mem); - word = read_mem; - - read_mem = 2; - printf("\nTesting quad output fast read\n"); - read_mem = spiflash_readfastQuadOutput(address, 0); - if (read_mem == word) { - printf( - "\nQuadFastOutput Read (%x) got same word as Expected (%x)\nSuccess\n", - address, read_mem); - } else { - printf("\nQuadFastOutput Read (%x) Different word from memory\nRead: (%x), " - "Read: (%x),Expected: (%x)\n", - address, read_mem, word); - test_result = 1; - } - - read_mem = 3; - printf("\nTesting dual input output fast read 0xbb\n"); - read_mem = spiflash_readfastDualInOutput(address, 0); - if (read_mem == word) { - printf("\nDualFastInOutput Read (%x) got same word as Expected " - "(%x)\nSuccess\n", - address, read_mem); - } else { - printf("\nDualFastInOutput Read (%x) Different word from memory\nRead: " - "(%x), Read: (%x),Expected: (%x)\n", - address, read_mem, word); - test_result = 1; - } - - read_mem = 4; - printf("\nTesting quad input output fast read 0xeb\n"); - read_mem = spiflash_readfastQuadInOutput(address, 0); - if (read_mem == word) { - printf("\nQuadFastInOutput Read (%x) got same word as Expected " - "(%x)\nSuccess\n", - address, read_mem); - } else { - printf("\nQuadFastInOutput Read (%x) Different word from memory\nRead: " - "(%x), Read: (%x),Expected: (%x)\n", - address, read_mem, word); - test_result = 1; - } - - printf("\nRead Non volatile Register\n"); - unsigned nonVolatileReg = 0; - bytes = 2; - unsigned command_aux = 0xb5; - spiflash_executecommand(COMMANS, 0, 0, ((bytes * 8) << 8) | command_aux, - &nonVolatileReg); - printf("\nNon volatile Register (16 bits):(%x)\n", nonVolatileReg); - - printf("\nRead enhanced volatile Register\n"); - unsigned enhancedReg = 0; - bytes = 1; - command_aux = 0x65; - frame = 0x00000000; - spiflash_executecommand(COMMANS, 0, 0, - (frame << 20) | ((bytes * 8) << 8) | command_aux, - &enhancedReg); - printf("\nEnhanced volatile Register (8 bits):(%x)\n", enhancedReg); - - // Testing xip bit enabling and xip termination sequence - printf("\nTesting xip enabling through volatile bit and termination by " - "sequence\n"); - unsigned volconfigReg = 0; - - printf("\nResetting flash registers...\n"); - spiflash_resetmem(); - - spiflash_readVolConfigReg(&volconfigReg); - printf("\nVolatile Configuration Register (8 bits):(%x)\n", volconfigReg); - - spiflash_XipEnable(); - - volconfigReg = 0; - spiflash_readVolConfigReg(&volconfigReg); - printf( - "\nAfter xip bit write, Volatile Configuration Register (8 bits):(%x)\n", - volconfigReg); - - // Confirmation bit 0 - read_mem = 1; - printf("\nTesting quad input output fast read with xip confirmation bit 0\n"); - read_mem = spiflash_readfastQuadInOutput(address, ACTIVEXIP); - printf("\nRead from memory address (%x) the word: (%x)\n", address, read_mem); - if (read_mem == word) { - printf("\nQuadFastInOutput XIP Read (%x) got same word as Expected " - "(%x)\nSuccess\n", - address, read_mem); - } else { - printf("\nQuadFastInOutput XIP Read (%x) Different word from memory\nRead: " - "(%x), Read: (%x),Expected: (%x)\n", - address, read_mem, word); - test_result = 1; - } - - int xipEnabled = 10; - xipEnabled = spiflash_terminateXipSequence(); - printf("\nAfter xip termination sequence: %d\n", xipEnabled); - volconfigReg = 0; - spiflash_readVolConfigReg(&volconfigReg); - printf("\nAfter xip termination sequence, Volatile Configuration Register (8 " - "bits):(%x)\n", - volconfigReg); - - // XIP Bit 0 -> XIP ON - if (((volconfigReg >> VOLCFG_XIP) & 0x1) == 0) { - printf("\nAssuming Xip active, read from memory, confirmation bit 1\n"); - read_mem = 1; - read_mem = spiflash_readMemXip(address, TERMINATEXIP); - printf("\nRead from memory address (%x) the word: (%x)\n", address, - read_mem); - } - - printf("Testing program flash\n"); - char prog_data[NSAMPLES] = {0}; - char *char_data = NULL; - unsigned int read_data[NSAMPLES] = {0}; - int sample = 0; - for (sample = 0; sample < NSAMPLES; sample++) { - prog_data[sample] = sample; - } - spiflash_memProgram(prog_data, NSAMPLES, 0x104); - for (sample = 0; sample < NSAMPLES; sample = sample + 4) { - read_data[sample >> 2] = spiflash_readmem(0x104 + sample); - } - // check prog vs read data - char_data = (char *)read_data; - for (sample = 0; sample < NSAMPLES; sample++) { - if (prog_data[sample] != char_data[sample]) { - printf("Error: data[%x] = %08x != read_data[%x] = %08x\n", sample, - prog_data[sample], sample, char_data[sample]); - test_result = 1; - } - } - -#endif // #ifndef VERILATOR -#endif // #ifdef SIMULATION + // #ifdef SIMULATION + // #ifndef VERILATOR + // unsigned int word = 0xA3A2A1A0; + // unsigned int address = 0x000100; + // unsigned int read_mem = 0xF0F0F0F0; + // printf("\nTest: %x, %x.\n", word, read_mem); + // // init spi flash controller + // spiflash_init(SPI0_BASE); + // printf("\nTesting SPI flash controller\n"); + // // Reading Status Reg + // unsigned int reg = 0x00; + // spiflash_readStatusReg(®); + // printf("\nStatus reg (%x)\n", reg); + // + // // Testing Fast Read in single, dual, quad + // unsigned bytes = 4, readid = 0; + // unsigned frame = 0x00000000; + // unsigned commFastRead = 0x0b; + // unsigned fastReadmem0 = 0, fastReadmem1 = 0, fastReadmem2 = 0; + // unsigned dummycycles = 8; + // + // // Read ID + // bytes = 4; + // readid = 0; + // spiflash_executecommand(COMMANS, 0, 0, ((bytes * 8) << 8) | READ_ID, + // &readid); + // + // printf("\nREAD_ID: (%x)\n", readid); + // // Read from flash memory + // printf("\nReading from flash (address: (%x))\n", address); + // read_mem = spiflash_readmem(address); + // + // if (word == read_mem) { + // printf("\nMemory Read (%x) got same word as Programmed(%x)\nSuccess\n", + // read_mem, word); + // } else { + // printf("\nDifferent word from memory\nRead: (%x), Programmed: (%x)\n", + // read_mem, word); + // test_result = 1; + // } + // + // address = 0x0; + // read_mem = 1; + // printf("\nTesting dual output fast read\n"); + // read_mem = spiflash_readfastDualOutput(address, 0); + // printf("\nRead from memory address (%x) the word: (%x)\n", address, + // read_mem); word = read_mem; + // + // read_mem = 2; + // printf("\nTesting quad output fast read\n"); + // read_mem = spiflash_readfastQuadOutput(address, 0); + // if (read_mem == word) { + // printf( + // "\nQuadFastOutput Read (%x) got same word as Expected + // (%x)\nSuccess\n", address, read_mem); + // } else { + // printf("\nQuadFastOutput Read (%x) Different word from memory\nRead: + // (%x), " + // "Read: (%x),Expected: (%x)\n", + // address, read_mem, word); + // test_result = 1; + // } + // + // read_mem = 3; + // printf("\nTesting dual input output fast read 0xbb\n"); + // read_mem = spiflash_readfastDualInOutput(address, 0); + // if (read_mem == word) { + // printf("\nDualFastInOutput Read (%x) got same word as Expected " + // "(%x)\nSuccess\n", + // address, read_mem); + // } else { + // printf("\nDualFastInOutput Read (%x) Different word from memory\nRead: + // " + // "(%x), Read: (%x),Expected: (%x)\n", + // address, read_mem, word); + // test_result = 1; + // } + // + // read_mem = 4; + // printf("\nTesting quad input output fast read 0xeb\n"); + // read_mem = spiflash_readfastQuadInOutput(address, 0); + // if (read_mem == word) { + // printf("\nQuadFastInOutput Read (%x) got same word as Expected " + // "(%x)\nSuccess\n", + // address, read_mem); + // } else { + // printf("\nQuadFastInOutput Read (%x) Different word from memory\nRead: + // " + // "(%x), Read: (%x),Expected: (%x)\n", + // address, read_mem, word); + // test_result = 1; + // } + // + // printf("\nRead Non volatile Register\n"); + // unsigned nonVolatileReg = 0; + // bytes = 2; + // unsigned command_aux = 0xb5; + // spiflash_executecommand(COMMANS, 0, 0, ((bytes * 8) << 8) | command_aux, + // &nonVolatileReg); + // printf("\nNon volatile Register (16 bits):(%x)\n", nonVolatileReg); + // + // printf("\nRead enhanced volatile Register\n"); + // unsigned enhancedReg = 0; + // bytes = 1; + // command_aux = 0x65; + // frame = 0x00000000; + // spiflash_executecommand(COMMANS, 0, 0, + // (frame << 20) | ((bytes * 8) << 8) | command_aux, + // &enhancedReg); + // printf("\nEnhanced volatile Register (8 bits):(%x)\n", enhancedReg); + // + // // Testing xip bit enabling and xip termination sequence + // printf("\nTesting xip enabling through volatile bit and termination by " + // "sequence\n"); + // unsigned volconfigReg = 0; + // + // printf("\nResetting flash registers...\n"); + // spiflash_resetmem(); + // + // spiflash_readVolConfigReg(&volconfigReg); + // printf("\nVolatile Configuration Register (8 bits):(%x)\n", + // volconfigReg); + // + // spiflash_XipEnable(); + // + // volconfigReg = 0; + // spiflash_readVolConfigReg(&volconfigReg); + // printf( + // "\nAfter xip bit write, Volatile Configuration Register (8 + // bits):(%x)\n", volconfigReg); + // + // // Confirmation bit 0 + // read_mem = 1; + // printf("\nTesting quad input output fast read with xip confirmation bit + // 0\n"); read_mem = spiflash_readfastQuadInOutput(address, ACTIVEXIP); + // printf("\nRead from memory address (%x) the word: (%x)\n", address, + // read_mem); if (read_mem == word) { + // printf("\nQuadFastInOutput XIP Read (%x) got same word as Expected " + // "(%x)\nSuccess\n", + // address, read_mem); + // } else { + // printf("\nQuadFastInOutput XIP Read (%x) Different word from + // memory\nRead: " + // "(%x), Read: (%x),Expected: (%x)\n", + // address, read_mem, word); + // test_result = 1; + // } + // + // int xipEnabled = 10; + // xipEnabled = spiflash_terminateXipSequence(); + // printf("\nAfter xip termination sequence: %d\n", xipEnabled); + // volconfigReg = 0; + // spiflash_readVolConfigReg(&volconfigReg); + // printf("\nAfter xip termination sequence, Volatile Configuration Register + // (8 " + // "bits):(%x)\n", + // volconfigReg); + // + // // XIP Bit 0 -> XIP ON + // if (((volconfigReg >> VOLCFG_XIP) & 0x1) == 0) { + // printf("\nAssuming Xip active, read from memory, confirmation bit + // 1\n"); read_mem = 1; read_mem = spiflash_readMemXip(address, + // TERMINATEXIP); printf("\nRead from memory address (%x) the word: + // (%x)\n", address, + // read_mem); + // } + // + // printf("Testing program flash\n"); + // char prog_data[NSAMPLES] = {0}; + // char *char_data = NULL; + // unsigned int read_data[NSAMPLES] = {0}; + // int sample = 0; + // for (sample = 0; sample < NSAMPLES; sample++) { + // prog_data[sample] = sample; + // } + // spiflash_memProgram(prog_data, NSAMPLES, 0x104); + // for (sample = 0; sample < NSAMPLES; sample = sample + 4) { + // read_data[sample >> 2] = spiflash_readmem(0x104 + sample); + // } + // // check prog vs read data + // char_data = (char *)read_data; + // for (sample = 0; sample < NSAMPLES; sample++) { + // if (prog_data[sample] != char_data[sample]) { + // printf("Error: data[%x] = %08x != read_data[%x] = %08x\n", sample, + // prog_data[sample], sample, char_data[sample]); + // test_result = 1; + // } + // } + // + // #endif // #ifndef VERILATOR + // #endif // #ifdef SIMULATION #ifdef SOC_LINUX_VERSAT_DEMO // Tests are too big and slow to perform during simulation. diff --git a/software/sw_build.mk b/software/sw_build.mk index 33cf503..b6c8d3d 100644 --- a/software/sw_build.mk +++ b/software/sw_build.mk @@ -244,9 +244,9 @@ ifeq ($(USE_ETHERNET),1) SOC_LINUX_BOOT_SRC+=src/iob_eth.c SOC_LINUX_BOOT_SRC+=src/iob_eth_csrs.c endif -SOC_LINUX_BOOT_SRC+=src/iob_spi.c -SOC_LINUX_BOOT_SRC+=src/iob_spiplatform.c -SOC_LINUX_BOOT_SRC+=src/iob_spi_master_csrs.c +# SOC_LINUX_BOOT_SRC+=src/iob_spi.c +# SOC_LINUX_BOOT_SRC+=src/iob_spiplatform.c +# SOC_LINUX_BOOT_SRC+=src/iob_spi_master_csrs.c SOC_LINUX_BOOT_SRC+=src/iob_printf.c From da6feabab03d5ca124a944f9265c167bd397cc2e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Artur=20N=C3=B3brega?= Date: Wed, 29 Jul 2026 16:55:55 +0100 Subject: [PATCH 2/3] chore(fpga): Increase timeout; Update py2hwsw. --- default.nix | 4 ++-- hardware/fpga/child2_fpga_build.mk | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/default.nix b/default.nix index 6fd1093..f485a36 100644 --- a/default.nix +++ b/default.nix @@ -5,8 +5,8 @@ { pkgs ? import (fetchTarball "https://github.com/NixOS/nixpkgs/archive/25.05.tar.gz") {} }: let - py2hwsw_commit = "4459f67afe8df4aa8d7701bdc4d99f9e5e09fa0d"; # Replace with the desired commit. - py2hwsw_sha256 = "AEDn8d5XTOKCqsGY1K1Z+tJzcILOLX1VeHgAPUk+G6k="; # Replace with the actual SHA256 hash. + py2hwsw_commit = "6787100624d4d524db2a667d06893dda5a409fda"; # Replace with the desired commit. + py2hwsw_sha256 = "OyrxMGBGu4mUmRdQu9fCbO9Bgrfjtmiu4j6mAFTc4wo="; # Replace with the actual SHA256 hash. # Get local py2hwsw root from `PY2HWSW_ROOT` env variable py2hwswRoot = builtins.getEnv "PY2HWSW_ROOT"; diff --git a/hardware/fpga/child2_fpga_build.mk b/hardware/fpga/child2_fpga_build.mk index d4917fa..114e15f 100644 --- a/hardware/fpga/child2_fpga_build.mk +++ b/hardware/fpga/child2_fpga_build.mk @@ -24,7 +24,7 @@ endif UFLAGS+=ETH_DEMO=$(ETH_DEMO) ifeq ($(ETH_DEMO),1) -GRAB_TIMEOUT= 1300 +GRAB_TIMEOUT= 1500 MINICOM_SCRIPT=minicom_eth_demo.txt CONSOLE_CMD += && ( cd ../../software/tests/iob_eth && ./validate_eth.sh -S root -p root -s 192.168.74.2 -i $(ETH_IF) ) # # Override CONSOLE_CMD: skip minicom (appended by child_fpga_build.mk) and run eth test instead From 6c3575a5f9f07745b0a6dd15047e6ea611058ffa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Artur=20N=C3=B3brega?= Date: Tue, 18 Aug 2026 01:14:26 +0100 Subject: [PATCH 3/3] feat(py2hwsw): Update py2hwsw to latest version --- default.nix | 4 ++-- hardware/fpga/minicom_eth_demo.txt | 18 ++---------------- software/src/soc_linux_firmware.c | 2 +- 3 files changed, 5 insertions(+), 19 deletions(-) diff --git a/default.nix b/default.nix index f485a36..be415b3 100644 --- a/default.nix +++ b/default.nix @@ -5,8 +5,8 @@ { pkgs ? import (fetchTarball "https://github.com/NixOS/nixpkgs/archive/25.05.tar.gz") {} }: let - py2hwsw_commit = "6787100624d4d524db2a667d06893dda5a409fda"; # Replace with the desired commit. - py2hwsw_sha256 = "OyrxMGBGu4mUmRdQu9fCbO9Bgrfjtmiu4j6mAFTc4wo="; # Replace with the actual SHA256 hash. + py2hwsw_commit = "3ba45fe1420f3b1ef67903c90f652172f8697949"; # Replace with the desired commit. + py2hwsw_sha256 = "5ANpITrAKXw8DX+uCnyPDueEoBRpYpCMgOwSA1gqO70="; # Replace with the actual SHA256 hash. # Get local py2hwsw root from `PY2HWSW_ROOT` env variable py2hwswRoot = builtins.getEnv "PY2HWSW_ROOT"; diff --git a/hardware/fpga/minicom_eth_demo.txt b/hardware/fpga/minicom_eth_demo.txt index 03ae3e0..631121c 100644 --- a/hardware/fpga/minicom_eth_demo.txt +++ b/hardware/fpga/minicom_eth_demo.txt @@ -7,7 +7,7 @@ # Set 15min timeout # runscript has 2min timeout by default: # check `timeout` in: https://linux.die.net/man/1/runscript -timeout 1200 +timeout 900 # Wait for the "buildroot login:" message # Or jump straight to shell if we are already logged in @@ -43,21 +43,7 @@ post_login: print "\n[minicom] Logged in. Running tests..." -send "ethtool -s "eth0" speed 100 duplex full autoneg off" - -expect { - "#" - timeout 20 goto on_timeout -} - -print "\n[minicom] Launch ssh to load required dependency modules (randomness)" -send "ssh -V" -expect { - "#" - timeout 900 goto on_timeout -} - -print "\n[minicom] Exit minicom to run standalone eth test" +print "\n[minicom] Exit minicom to run standalone iob_eth test" # Exit minicom ! kill `cut -f4 -d' ' /proc/$PPID/stat` diff --git a/software/src/soc_linux_firmware.c b/software/src/soc_linux_firmware.c index a0113bd..0fbcb54 100644 --- a/software/src/soc_linux_firmware.c +++ b/software/src/soc_linux_firmware.c @@ -130,7 +130,7 @@ int main() { printf_init(&uart16550_putc); #ifdef SOC_LINUX_USE_ETHERNET // init eth - eth_init(ETH0_BASE, &clear_cache); + eth_init(ETH0_BASE, IOB_BSP_FREQ, &clear_cache, &printf_); eth_wait_phy_rst(); #endif // SOC_LINUX_USE_ETHERNET