From b3f551e98102edb6173e0010c7f8f2eed4a52af8 Mon Sep 17 00:00:00 2001 From: modolaty Date: Tue, 14 Jul 2026 13:50:09 -0500 Subject: [PATCH] arm64:dts: Add SP8 PRB System VR - Change SP8 PRM Falcon P0 3.3V to FS1006 - change SP8 PRB Seagull P0 and P1 3.3V to FS1006 Tested: - verified in SP8 Falcon and Seagull Signed-off-by: modolaty --- arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-falcon.dts | 4 ++-- arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-seagull.dts | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-falcon.dts b/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-falcon.dts index fb401781a5a298..3acfe21d125728 100644 --- a/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-falcon.dts +++ b/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-falcon.dts @@ -332,7 +332,7 @@ vdd33s5run@08 { // P0_VDD_33_S5_RUN // TDK:FS1604 - compatible = "tdk,fs1604"; + compatible = "tdk,fs1006"; reg = <0x08>; }; vdd18s5run@47 { @@ -369,7 +369,7 @@ compatible = "infineon,tda38725a"; reg = <0x4F>; }; - p2v5_aux@0B{ + p5v_s5@0B{ // 0B in EVT2 // P5V_S5 // TDK:FS1006 diff --git a/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-seagull.dts b/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-seagull.dts index 09a90419838b21..5d1aaa90ecadb1 100644 --- a/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-seagull.dts +++ b/arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-seagull.dts @@ -348,7 +348,7 @@ }; p0vdd33s5run@08 { //P0_VDD_33_S5_RUN - compatible = "tdk,fs1604"; + compatible = "tdk,fs1006"; reg = <0x08>; }; p0vdd18s5run@47 { @@ -490,7 +490,7 @@ }; p1vdd33s5run@08 { //P1_VDD_33_S5_RUN - compatible = "tdk,fs1604"; + compatible = "tdk,fs1006"; reg = <0x08>; }; p1vdd18s5run@47 {